MCP1726T-ADJZEMF Microchip Technology, MCP1726T-ADJZEMF Datasheet - Page 39
MCP1726T-ADJZEMF
Manufacturer Part Number
MCP1726T-ADJZEMF
Description
Regulator, Extended Industrial, HVSON, 8-Pin|
Manufacturer
Microchip Technology
Datasheet
1.MCP1726T-ADJZEMF.pdf
(154 pages)
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4.2.4
Each GPIO pin is multiplexed with other functions. The
pins and their combined functions are briefly described
here. For specific information about individual functions
such as the comparator or the A/D, refer to the
appropriate section in this data sheet.
4.2.4.1
Figure 4-2 shows the diagram for this pin. The GP0 pin
is configurable to function as one of the following:
• a general purpose I/O
• an analog input for the A/D
• an analog input to the comparator
• an analog input to the ultra low-power wake-up
• In-Circuit Serial Programming data
FIGURE 4-2:
2003 Microchip Technology Inc.
DATA BUS
INTERRUPT-ON-
GPIO
TRISIO
WPU
TRISIO
GPIO
IOC
WPU
IOC
WR
WR
WR
WR
RD
RD
RD
RD
CHANGE
D
D
D
D
TO COMPARATOR
TO A/D CONVERTER
TO ULTRA LOW-POWER WAKE-UP
CK
CK
CK
CK
PIN DESCRIPTIONS AND
DIAGRAMS
GP0/AN0/CIN+/ICSPDAT
Q
Q
Q
Q
Q
Q
Q
Q
INPUT MODE
BLOCK DIAGRAM OF GP0
ANALOG
RD GPIO
INPUT MODE
GPPU
ANALOG
Q
Q
EN
EN
D
D
V
DD
WEAK
V
V
DD
SS
Advance Information
I/O PIN
4.2.4.2
Figure 4-2 shows the diagram for this pin. The GP1 pin
is configurable to function as one of the following:
• a general purpose I/O
• an analog input for the A/D
• a analog input to the comparator
• a voltage reference input for the A/D
• In-Circuit Serial Programming clock
FIGURE 4-3:
DATA BUS
INTERRUPT-ON-
GPIO
TRISIO
WPU
TRISIO
GPIO
WPU
IOC
WR
WR
WR
WR
IOC
RD
RD
RD
RD
CHANGE
D
D
D
D
TO COMPARATOR
TO A/D CONVERTER
CK
CK
CK
CK
GP1/AN1/CIN-/V
Q
Q
Q
Q
Q
Q
Q
Q
INPUT MODE
BLOCK DIAGRAM OF GP1
ANALOG
RD GPIO
PIC12F683
INPUT MODE
GPPU
ANALOG
Q
Q
REF
EN
EN
/ICSPCLK
DS41211A-page 37
D
D
V
DD
WEAK
V
V
DD
SS
I/O PIN
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