MCP1726T-ADJZEMF Microchip Technology, MCP1726T-ADJZEMF Datasheet - Page 26

• Manufacturer Part Number: MCP1726T-ADJZEMF
• Description: Regulator, Extended Industrial, HVSON, 8-Pin|
• Manufacturer: Microchip Technology

PIC12F683
3.6.2
Clock switching will occur for the following reasons:
• The Fail-Safe Clock Monitor is enabled, the
• A wake-up due to a Reset or a POR, and the
• A wake-up from Sleep occurs due to an interrupt
• SCS bit is modified by the user or a Reset.
• IRCF bits are modified by the user or a Reset.
For
“Two-Speed
Section 12.6.4 “Fail-Safe Clock Monitor”.
DS41211A-page 24
device is running from the primary oscillator (i.e.,
the oscillator defined by the FOSC<2:0>), and the
primary oscillator fails. The clock source will
switch to the secondary clock source, INTOSC.
device is configured for Two-speed Start-up or
Fail-Safe Clock Monitor. The device will switch
from the secondary clock source to the primary
after it has stabilized.
or WDT wake-up, Two-speed Start-up or Fail-Safe
Clock Monitor is enabled, the primary clock is XT,
HS, or LP and the SCS (OSCCON<0>) is clear.
The clock will switch from the secondary to the
primary system clock after the Oscillator Start-up
Timer expires in 1024 clocks.
Note:
more
CLOCK SWITCHING
Clock switching will not occur if the primary
system clock is already configured as
INTOSC.
information,
Clock
Start-up
see
Section 12.6.3
Mode”
Advance Information
and
3.6.3
When clock switching is performed and the primary
oscillator is XT, HS or LP, the Watchdog Timer is not
available while the Oscillator Start-up Timer is active
(1024 clocks). This is due to the Watchdog Timer and
Oscillator Start-up Timer sharing the same ripple
counter.
Once the clock transition is complete, the Watchdog
Counter is re-enabled with the Counter Reset. This
allows the user to synchronize the Watchdog Timer to
the start of execution at the new clock frequency.
CLOCK TRANSITION AND WDT
 2003 Microchip Technology Inc.