LM3S101-CRN20-XNPT Luminary Micro, Inc., LM3S101-CRN20-XNPT Datasheet - Page 13

• Manufacturer Part Number: LM3S101-CRN20-XNPT
• Description: Microcontroller
• Manufacturer: Luminary Micro, Inc.

About This Document
Audience
About This Manual
Related Documents
Documentation Conventions
Table 0-1.
13
General Register Notation
REGISTER
bit
bit field
offset 0xnnn
Register N
This data sheet provides reference information for the LM3S101 microcontroller, describing the
functional blocks of the system-on-chip (SoC) device designed around the ARM® Cortex™-M3
core.
This manual is intended for system software developers, hardware designers, and application
developers.
This document is organized into sections that correspond to each major feature.
The following documents are referenced by the data sheet:
This documentation list was current as of publication date. Please check our web site at
www.luminarymicro.com for additional related documentation, including application notes and
white papers.
This document uses the conventions shown in Table 0-1.
ARM® Cortex™-M3 Technical Reference Manual
CoreSight™ Design Kit Technical Reference Manual
ARM® v7-M Architecture Application Level Reference Manual
Documentation Conventions
Notation
Registers are indicated in uppercase bold. For example, PBORCTL
is the Power-On and Brown-Out Reset Control register. If a register
name contains a lowercase n, it represents more than one register.
For example, SRCRn represents any (or all) of the three Software
Reset Control registers: SRCR0, SRCR1, and SRCR2.
A single bit in a register.
Two or more consecutive and related bits.
A hexadecimal increment to a register’s address, relative to that
module’s base address as specified in Table 3-1, "Memory Map," on
page 29.
Registers are numbered consecutively throughout the document to
aid in referencing them. The register number has no meaning to
software.
Preliminary
Meaning
March 22, 2006