LM3S101-CRN20-XNPT Luminary Micro, Inc., LM3S101-CRN20-XNPT Datasheet - Page 7

• Manufacturer Part Number: LM3S101-CRN20-XNPT
• Description: Microcontroller
• Manufacturer: Luminary Micro, Inc.

List of Tables
Table 0-1.
Table 3-1.
Table 4-1.
Table 4-2.
Table 5-1.
Table 5-2.
Table 6-1.
Table 6-2.
Table 6-3.
Table 6-4.
Table 7-1.
Table 7-2.
Table 8-1.
Table 8-3.
Table 8-2.
Table 9-1.
Table 9-2.
Table 10-1.
Table 11-1.
Table 12-1.
Table 13-1.
Table 13-2.
Table 13-3.
Table 13-4.
Table 15-1.
Table 15-2.
Table 15-3.
Table 15-4.
Table 16-1.
Table 16-2.
Table 17-1.
Table 17-2.
Table 17-3.
Table 17-4.
Table 17-5.
Table 17-6.
Table 17-7.
Table 17-8.
Table 17-9.
Table 17-10. JTAG Characteristics............................................................................................................... 277
Table 17-11. GPIO Characteristics............................................................................................................... 279
Table 17-12. Reset Characteristics .............................................................................................................. 279
7
Documentation Conventions ..................................................................................................... 13
Exception Types ........................................................................................................................ 31
Interrupts ................................................................................................................................... 32
Default Crystal Field Values and PLL Programming ................................................................. 72
Flash Protection Policy Combinations ....................................................................................... 81
WDT Register Map .................................................................................................................. 161
UART Register Map ................................................................................................................ 187
SSI Register Map .................................................................................................................... 228
Comparator 0 Operating Modes .............................................................................................. 252
Comparator 1 Operating Modes .............................................................................................. 252
Internal Reference Voltage and ACREFCTL Field Values ...................................................... 253
Analog Comparator Register Map ........................................................................................... 254
Signals by Pin Number ............................................................................................................ 263
Signals by Signal Name .......................................................................................................... 265
Signals by Function, Except for GPIO ..................................................................................... 267
GPIO Pins and Alternate Functions......................................................................................... 268
Thermal Characteristics........................................................................................................... 270
Maximum Ratings.................................................................................................................... 271
Recommended DC Operating Conditions ............................................................................... 271
LDO Regulator Characteristics................................................................................................ 272
Power Specifications ............................................................................................................... 272
Power-Up and Brown-Out Detect Characteristics ................................................................... 273
Flash Memory Characteristics ................................................................................................. 273
Phase Locked Loop (PLL) Characteristics .............................................................................. 274
Clock Characteristics............................................................................................................... 274
SSI Characteristics .................................................................................................................. 275
Memory Map.............................................................................................................................. 29
JTAG Port Pins Reset State ...................................................................................................... 36
JTAG Instruction Register Commands ...................................................................................... 40
System Control Register Map.................................................................................................... 49
VADJ to VOUT .......................................................................................................................... 61
PLL Mode Control...................................................................................................................... 73
Flash Register Map ................................................................................................................... 83
Pad Configuration Examples ..................................................................................................... 97
GPIO Register Map ................................................................................................................... 98
Interrupt Configuration Example................................................................................................ 98
16-Bit Timer With Prescaler Configurations ............................................................................ 133
GPTM Register Map................................................................................................................ 140
Temperature Characteristics ................................................................................................... 270
Preliminary
March 22, 2006