LM3S101-CRN20-XNPT Luminary Micro, Inc., LM3S101-CRN20-XNPT Datasheet - Page 23

• Manufacturer Part Number: LM3S101-CRN20-XNPT
• Description: Microcontroller
• Manufacturer: Luminary Micro, Inc.

Architectural Overview
1.4.5
1.4.5.1
1.4.5.2
1.4.5.3
1.4.6
23
The Stellaris I
The I
Devices on the I
both sending and receiving data as either a master or a slave, and also supports the simultaneous
operation as both a master and a slave. The four I
Receive, Slave Transmit, and Slave Receive.
The Stellaris I
Both the I
a transmit or receive operation completes (or aborts due to an error). The I
interrupts when data has been sent or requested by a master.
System Peripherals
Programmable GPIOs (Section 8 on page 93)
General-purpose input/output (GPIO) pins offer flexibility for a variety of connections.
The LM3S101 controller GPIO module is composed of three physical GPIO blocks, each
corresponding to an individual GPIO port. The GPIO module is FiRM-compliant (compliant to the
ARM Foundation IP for Real-Time Microcontrollers specification) and supports 2 to 18
programmable input/output pins. The number of GPIOs available depends on the peripherals
being used (see Table 15-4 on page 268 for the signals available to each GPIO pin).
The GPIO module features programmable interrupt generation as either edge-triggered or level-
sensitive on all pins, programmable control for GPIO pad configuration, and bit masking in both
read and write operations through address lines.
Two Programmable Timers (Section 9 on page 130)
Programmable timers can be used to count or time external events that drive the Timer input pins.
The LM3S101 controller General-Purpose Timer Module (GPTM) contains two GPTM blocks.
Each GPTM block provides two 16-bit timer/counters that can be configured to operate
independently as timers or event counters, or configured to operate as one 32-bit timer or one 32-
bit Real-Time Clock (RTC).
When configured in 32-bit mode, a timer can run as a one-shot timer, periodic timer, or Real-Time
Clock (RTC). When in 16-bit mode, a timer can run as a one-shot timer or periodic timer, and can
extend its precision by using an 8-bit prescaler. A 16-bit timer can also be configured for event
capture or Pulse Width Modulation (PWM) generation.
Watchdog Timer (Section 10 on page 160)
A watchdog timer can generate nonmaskable interrupts (NMIs) or a reset when a time-out value is
reached. The watchdog timer is used to regain control when a system has failed due to a software
error or to the failure of an external device to respond in the expected way.
The LM3S101 controller Watchdog Timer module consists of a 32-bit down counter, a
programmable load register, interrupt generation logic, and a locking register.
The Watchdog Timer can be configured to generate an interrupt to the controller on its first time-
out, and to generate a reset signal on its second time-out. Once the Watchdog Timer has been
configured, the lock register can be written to prevent the timer configuration from being
inadvertently altered.
Memory Peripherals
The LM3S101 controller offers both SRAM and Flash memory.
2
C bus supports devices that can both transmit and receive (write and read) data.
2
C master and slave can generate interrupts. The I
2
2
C module provides the ability to communicate to other IC devices over an I
C module can operate at two speeds: Standard (100 Kbps) and Fast (400 Kbps).
2
C bus can be designated as either a master or a slave. The I
Preliminary
2
C modes are: Master Transmit, Master
2
C master generates interrupts when
2
C slave generates
2
C module supports
March 22, 2006
2
C bus.