UPD98405 NEC, UPD98405 Datasheet - Page 13

• Manufacturer Part Number: UPD98405
• Description: 155M ATM INTEGRATED SAR CONTROLLER
• Manufacturer: NEC

SIZE2
SIZE1
SIZE0
DR/W_B
ATTN_B
GNT_B
RDY_B
Pin Name
Pin No.
294
291
63
64
65
60
23
I/O
O
O
O
I
I
I/O Level
Data Sheet S12689EJ2V0DS00
TTL
TTL
TTL
TTL
TTL
Burst size.
These pins indicate the size of current DMA transfer. They are
used to interface with a bus (such as S bus) that requires an
explicit burst size.
DMA read/write.
This pin indicates the direction of DMA access.
Attention (DMA request).
The PD98405 makes the ATTN_B signal low when it is to
execute a DMA operation. The ATTN_B signal becomes
inactive in synchronization with the rising edge of CLK when
only one more word of data is to be transferred by means of
DMA.
Bus enable.
The GNT_B signal goes low when the bus arbiter grants the
from the PD98405. When the PD98405 detects that the
GNT_B signal has gone low, it starts a DMA operation,
assuming that the bus mastership has been granted.
Target device ready.
This signal informs the PD98405 in the DMA cycle that the
target device is ready for input/output. The PD98405 makes
the RDY_B signal low if valid data exists on AD31 through AD0
when it executes a DMA read operation. When executing a
DMA write operation, the PD98405 makes the ATTN_B signal
low if the target device is ready for reception.
The timing at which the PD98405 samples the RDY_B and
ABRT_B signals can be bring forward by 1 clock depending on
the setting of an internal register (GMR register).
PD98405 the bus mastership in response to a DMA request
Others
1: Read access
0: Write access
SIZE2
0
0
0
0
1
1
SIZE1
0
0
1
1
0
0
SIZE0
0
1
0
1
0
1
Function
1-word transfer
2-word burst
4-word burst
8-word burst
16-word burst
12-word burst
Undefined
Function
PD98405
(2/3)
13