AN2768 Freescale Semiconductor / Motorola, AN2768 Datasheet - Page 10

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AN2768

Manufacturer Part Number
AN2768
Description
Implementation of a 128-Point FFT on the MRC6011 Device
Manufacturer
Freescale Semiconductor / Motorola
Datasheet
The FFT on the MRC6011 Device
Since the input data is transposed to produce the bit-reversed input for a decimation in time FFT, the initial data
organization in the frame buffer is not crucial. The input data are signed 2’s complement 16-bit fixed-point
numbers between –1.0 and +1.0.
3.2 Twiddle Factor Storage in Frame Buffer
The organization of the twiddle factors in the frame buffer is important for the butterfly operations because the
MAC operation takes the twiddle factor as an argument directly from the frame buffer (see Figure 10). Both real
and imaginary twiddle factors for every stage of the butterfly operation are accessed with two pointers pointing to
the two parts of the twiddle factors, respectively. The twiddle factors are 2’s complement 16-bit fixed-point
numbers between –1.0 and +1.0. For easy access during the butterfly operations, the stage 1 twiddle factor is a
single twiddle factor that coincides with the first of the stage 2 twiddle factors.
10
Implementation of a 128-Point FFT on the MRC6011 Device, Rev. 0
Figure 10. Real Twiddle Factor Storage in the Frame Buffer
Imaginary
16
32
64
8
8
8
Real
Figure 9. Input Data Storage in Frame Buffer
0
8
0
8
Stage 2 Twiddle Factors
Stage 3 Twiddle Factors
Stage 4 Twiddle Factors
Stage 5 Twiddle Factors
Stage 5 Twiddle Factors
Stage 6 Twiddle Factors
Stage 6 Twiddle Factors
Stage 6 Twiddle Factors
Stage 6 Twiddle Factors
Stage 7 Twiddle Factors
Stage 7 Twiddle Factors
Stage 7 Twiddle Factors
Stage 7 Twiddle Factors
Stage 7 Twiddle Factors
Stage 7 Twiddle Factors
Stage 7 Twiddle Factors
Stage 7 Twiddle Factors
1
9
1
9
2
2
3
3
4
4
5
5
126
126
6
6
127
127
7
7
Cosine
Freescale Semiconductor

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