AN2768 Freescale Semiconductor / Motorola, AN2768 Datasheet - Page 16

• Manufacturer Part Number: AN2768
• Description: Implementation of a 128-Point FFT on the MRC6011 Device
• Manufacturer: Freescale Semiconductor / Motorola

The FFT on the MRC6011 Device
The procedure for computing the 128-point FFT on the RCF architecture is summarized as follows:
Since each group has 16 data items, eight butterflies can be formed. One row of RCs can perform eight butterflies
simultaneously, so the 2 × 8 RC array can perform 16 simultaneous butterfly operations. In step one, for example,
the group 1 and group 2 butterfly operations are simultaneously performed on the first and second rows of the RC
array. Next are the group 3 and group 4 butterfly operations for stage 1. The following sections explain how the
basic 2-point butterfly operation is performed on the RCs. Examples are presented from stage to stage.
3.5.1 2-point Butterfly Operation on RC
In Example 3, the group 1 (G1) butterfly operations are performed on the top row of the RC array, and the G2
butterfly operations are performed on the bottom row. Each cell gets two complex samples. The results of the
butterfly operation are inputs to the butterfly operation at the next stage. A total of 16 butterfly operations are
performed in parallel, and each cell computes one butterfly at a time. The code segment in Example 3 shows how
the 16 butterflies are simultaneously performed on the RC array.
16
G1
G2
G3
G4
1.
2.
3.
4.
5.
Groups 1–4 are in stage 1 for six butterfly operations.
The intermediate results are of groups 1–4 are sent to the frame buffer.
Groups 5–8 are in stage 1 for six butterfly operations.
(G1, G5), (G2, G6), (G3, G7), (G4, G8) are paired to complete stage 7 butterfly operations.
The final results are output to the frame buffer.
x[0]
x[4]
x[2]
x[6]
x[1]
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Implementation of a 128-Point FFT on the MRC6011 Device, Rev. 0
Stage 1
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Figure 14. 8-point DIT FFT Butterfly Diagram
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Stage 2
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Stage 3
Freescale Semiconductor
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