AN2768 Freescale Semiconductor / Motorola, AN2768 Datasheet - Page 20

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AN2768

Manufacturer Part Number
AN2768
Description
Implementation of a 128-Point FFT on the MRC6011 Device
Manufacturer
Freescale Semiconductor / Motorola
Datasheet
The FFT on the MRC6011 Device
Figure 18 shows data regrouping for stage 4 of G1 data, with data exchanges among cell pairs (1,5), (2,6), (3,7),
(4,8). A comparison of Figure 16 through Figure 18 demonstrates that data regrouping effectively shrinks the
spans of the butterflies at each stage so that the parallel butterflies shown in Figure 15 can continue for subsequent
stages. At the end of stage 4, data regrouping causes an exchange of data between the two rows of RCs. At the end
of stage 5, data regrouping causes an exchange of data by swapping registers so that Group 1 and Group 3 are
paired to form butterflies. For the last stage, the register-resident groups (G5 to G8) must pair with the groups in the
frame buffer (G1 to G4) to form butterflies. Continuously regrouping data causes the 16 parallel butterflies at each
stage to be performed in virtually the same way within respective cells. Example 4 shows a code segment for data
regrouping in Group 1 data for stage 2. The data is regrouped in four RC cycles to prepare it for the next stage of
FFT butterfly operations.
20
G1
H0
H0
Cell →
R8{0,*}
R9{0,*}
R4{0,*}
R0{0,*}
1
H16
H32
Figure 17. Data Regrouping for Stage 3 of Butterfly Operations for Group 1 Data
H64 H80 H32 H48 H96 H112 H8
H64 H96 H16 H48 H80
H[ 0]r
H[ 0]i
H[ 32]r
H[ 32]i
Implementation of a 128-Point FFT on the MRC6011 Device, Rev. 0
1
2
H[ 64]r
H[ 64]i
H[ 96]r
H[ 96]i
2
3
H[ 16]r
H[ 16]i
H[ 48]r
H[ 48]i
3
4
H112 H8
H[ 80]r
H[ 80]i
H[ 112]r
H[ 112]i
4
5
H[ 8]r
H[ 8]i
H[ 40]r
H[ 40]i
H24 H72 H88 H40 H56 H104 H120
H40 H72 H104 H24 H56 H88
5
H[ 72]r
H[ 72]i
H[ 104]r
H[ 104]i
6
6
H[ 24]r
H[ 24]i
H[ 56]r
H[ 56]i
7
7
Freescale Semiconductor
H[ 88]r
H[ 88]i
H[ 120]r
H[ 120]i
8
8
H120

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