AN2768 Freescale Semiconductor / Motorola, AN2768 Datasheet - Page 6

• Manufacturer Part Number: AN2768
• Description: Implementation of a 128-Point FFT on the MRC6011 Device
• Manufacturer: Freescale Semiconductor / Motorola

MRC6011 Architecture Overview
If we define
The 2-point butterfly output in Equation 6 and Equation 7 can be formulated as follows:
Where
This relationship in Equation 12 can be used to simplify the computation of the second output.
1.3 Bit Reversal
The radix-2 FFT needs bit-reversed data ordering; that is, the MSBs become LSBs and the LSBs become MSBs.
Table 1 shows an example of bit-reversal with an 8-point input sequence.
Bit reversal is convenient for in-place computation of an FFT. With bit reversal of the input sequence, the output
sequence is ordered normally from 0 to N –1.
2
The MRC6011 processor is the first Freescale device based on the RCF core. It is a highly integrated system-on-a-
Chip (SoC) that combines six reconfigurable RCF cores into a homogeneous compute node. The six RCF cores
reside in two RC modules containing three RCF cores each. The RCF cores on the MRC6011 device instantiate the
2 × 8 processing array depicted in Figure 17. Both RC modules are accessible via an antenna slave interface and
two slave I/O Interfaces. Each antenna interface can interact with up to 16 antennas, and each RCF core can
manipulate the data from two antennas. The processed data goes either to one of the two slave I/O bus interfaces
(industry-wide DSP device-compatible) or to another RCF core in the same or the adjacent module. At 250 MHz,
6
Bit reversed Binary
Decimal Equivalent
MRC6011 Architecture Overview
Binary Equivalent
Decimal Number
Implementation of a 128-Point FFT on the MRC6011 Device, Rev. 0
G
G
C
[
[
k
k
0
000
000
0
Table 1. Bit Reversal with 8-Point Input Sequence
=
1
2
]
]
cos(
=
=
=
=
+
+
G
G
G
x
G
x
re
im
j
j
2
{
re
re
{
re
re
[
[
π
x
x
k
k
[
[
[
[
1
001
100
4
r
k
k
im
k
k
2
2
im
1
1
]
1
/
2
]
[
]
]
[
]
]
=
N
k
=
k
+
+
−
1
+
1
)
2
]
2
]
{
x
jG
x
+
jG
x
−
x
and
re
re
im
re
x
im
x
[
im
[
[
2
010
010
2
k
[
k
im
[
im
k
k
[
1
2
k
1
k
[
2
[
]
]
1
]
k
k
C
2
]
]
−
S
C
−
2
]
2
]
G
+
]
G
=
C
+
C
re
x
im
sin(
−
x
+
[
3
011
110
6
im
[
k
im
k
x
x
1
[
1
[
]
2
k
re
re
]
k
π
2
[
[
2
r
]
k
k
S
]
/
2
S
2
]
N
]
}
S
S
4
100
001
1
)
}
}
5
101
101
5
Freescale Semiconductor
6
110
011
3
Equation 10
Equation 11
Equation 12
7
111
111
7
Equation 9