AN2768 Freescale Semiconductor / Motorola, AN2768 Datasheet - Page 17

• Manufacturer Part Number: AN2768
• Description: Implementation of a 128-Point FFT on the MRC6011 Device
• Manufacturer: Freescale Semiconductor / Motorola

_DEC_CIRCULAR_BUFFER_SELECT = 0;
With reference to Equation 10, the first four cycles compute
with rounding, respectively. All R14 registers hold a value of 0x8000. They are first sign extended to 0xFFFF8000
and then subtracted from the products so that the sixteenth bit is rounded to improve precision in the 128-point
FFT.
The NOP operation is for MAC pipeline delay when an ADD instruction follows a MAC instruction. The four
cycles after the NOP compute the real and imaginary parts
compute
notation for the input/output and intermediate results.
Figure 15 shows a complete picture of the stage 1 butterfly operation on the RC array for G1 and G2 data, which
matches the code segment described in Example 3. The top portion of the figure shows the eight parallel butterfly
operations for G1 data, and the lower portion shows another eight parallel butterfly operations for G2 data. In each
cell are two complex samples or four 16-bit values stored in registers R4, R0, R5, R1, respectively. The R4{0,*}
notation indicates the R4 register in every cell in the first row of the RC array. The R4 registers hold the real
portions of half of the G1 samples. The corresponding imaginary portions are in R0{0,*} of these cells.
Freescale Semiconductor
_DEC_AUTOINCREMENT0 = (unsigned long)psiFBInputData;
/* Stage1 */
/* G1,G2[Re,Im] = k1[R4,R0], k2[R5,R1], tmp = R8,R9 */
CELL{*,*} R13 = MULSIH{FB{psiFBInputTwiddleCos, 0, OMEGA_BR2, COL_BUS, WORD},R5, R14} << 1;
CELL{*,*} R12 = MULSIH{FB{psiFBInputTwiddleCos, 0, OMEGA_BR2, COL_BUS, WORD},R1, R14} << 1;
CELL{*,*} R11 = MULSIH{FB{psiFBInputTwiddleSin, 0, OMEGA_BR2, COL_BUS, WORD},R1, R14} << 1;
CELL{*,*} R10 = MULSIH{FB{psiFBInputTwiddleSin, 0, OMEGA_BR2, COL_BUS, WORD},R5, R14} << 1;
CELL{*,*} NOP{};
CELL{*,*} R13 = ADD{R13, R11};
CELL{*,*} R12 = SUB{R12, R10};
CELL{*,*} R8 = ADD{R4, R13};
CELL{*,*} R9 = ADD{R0, R12};
CELL{*,*} R4 = MULSIL{R15,R4,R8};
CELL{*,*} R0 = MULSIL{R15,R0,R9};
G
re
[
k
2
Table 3. Symbols of Input/Output and Intermediate Results of the 128-point FFT
]
and
G
Example 3. Parallel Butterfly Operations without Scaling Down
Implementation of a 128-Point FFT on the MRC6011 Device, Rev. 0
im
[
k
2
]
Stage 1 Output
Stage 2 Output
Stage 3 Output
Stage 4 Output
Stage 5 Output
Stage 6 Output
Stage 7 Output
Butterfly Input
to complete the stage 1 butterfly operations for G1 and G2. Table 3 provides the
G
x
re
re
[
[
k
k
1
]
2
]
and
C
Symbols
X[ k]
G[ k]
H[ k]
I [ k]
,
J[ k]
K[k]
L[k]
Y[k]
x
G
im
im
[
k
[
k
2
1
]
C
]
The FFT on the MRC6011 Device
of
,
x
G
im
[
[
k
k
1
2
]
]
. The last two cycles
S
and
x
re
[
k
2
]
S
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