AN2768 Freescale Semiconductor / Motorola, AN2768 Datasheet - Page 24

• Manufacturer Part Number: AN2768
• Description: Implementation of a 128-Point FFT on the MRC6011 Device
• Manufacturer: Freescale Semiconductor / Motorola

Fixed-Point and Precision Issues
at any time equal their magnitude (they become either purely real or purely imaginary). Therefore, the magnitude
of the FFT input data must be limited by
input equals the magnitude and therefore must satisfy
We can achieve this bound by scaling the input data so that it resides in the lower 6 bits of the 16-bit word, yielding
10 guard bits to accommodate the worst case growth. For a complex input FFT, we must account for the imaginary
part, and the bounds must not become as follows:
This requirement forces the input data to be scaled so that it resides in the lower five bits of the input data. While
scaling satisfies the requirements to avoid overflow, it has a detrimental effect in that precision is lost in the input
data because the magnitude of the butterfly increases at every stage. However, this growth can be avoided by
scaling the outputs of all of the FFT butterflies by a factor of 0.5 (one bit). Since this scaling is uniform through the
FFT (because all points are treated equally), we must apply a common scale factor to the FFT results, as follows:
This scaling is now applied to Equation 13 to obtain the bounds for the butterfly outputs with scaling:
With two’s complement fixed-point notation, we ensure that the magnitude of the butterfly inputs is less than one at
all times. We use 15 bits for the most possible precision with a signed two’s complement fixed-point 16-bit number.
The next section discusses the implementation details of this technique.
4.2 Butterfly Output Scaling
The scaling approach is illustrated in Figure 22. The two numbers added together at each stage of the butterfly
flow are divided by 2 (right shift by 1 bit) to avoid immediate overflow. This approach is very effective and proven
to eliminate any overflows. The final FFT outputs are reduced by N due to the consecutive right bit shift at each
stage, where the N is the number of FFT points. In our implementation, the final FFT spectrum is reduced to 1/128
of the original Matlab-computed spectrum. Nonetheless, the shape of the spectrum is the same as that of the
floating-point spectrum.
The butterfly output scaling approach is simple to implement on the RCF. The code segment in Example 5
illustrates the simplicity of the implementation.
24
max A B
------------------------------- -
Implementation of a 128-Point FFT on the MRC6011 Device, Rev. 0
N
Real Part:
Imaginary Part:
=
(
2
2
,
log
2
N
–
)
-------- -
128
0.5
≤
M 1.0 N
max C D
≤
–
<
-------- -
128
R x nT
0.5
(
(
≤
I x nT
⁄
)
,
(
≤
. For a real-input 128-point FFT, the absolute value of the
x nT
-------- -
128
0.5
(
)
) max A B
≤
≤
)
-------- -
128
0.5
<
-------- -
128
1
.
(
,
)
Freescale Semiconductor
Equation 14