LM3S301 Luminary Micro, Inc, LM3S301 Datasheet - Page 182

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LM3S301

Manufacturer Part Number
LM3S301
Description
Lm3s301 Arm Microcontroller
Manufacturer
Luminary Micro, Inc
Datasheet

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Watchdog Timer
182
Reset
Type
Reset
Type
Bit/Field
Watchdog Raw Interrupt Status (WDTRIS)
Offset 0x010
31:1
RO
RO
31
15
0
0
0
Register 5: Watchdog Raw Interrupt Status (WDTRIS), offset 0x010
This register is the raw interrupt status register. Watchdog interrupt events can be monitored via
this register if the controller interrupt is masked.
RO
RO
30
14
0
0
reserved
WDTRIS
Name
RO
RO
29
13
0
0
reserved
RO
RO
28
12
0
0
Type
RO
RO
RO
RO
27
11
0
0
RO
RO
26
10
0
0
Reset
RO
RO
25
0
9
0
0
0
Preliminary
RO
RO
24
0
8
0
reserved
Description
Reserved bits return an indeterminate value, and should
never be changed.
Watchdog Raw Interrupt Status
Gives the raw interrupt state (prior to masking) of
WDTINTR.
RO
RO
23
0
7
0
RO
RO
22
0
6
0
RO
RO
21
0
5
0
RO
RO
20
0
4
0
RO
RO
19
0
3
0
RO
RO
18
0
2
0
RO
RO
17
July 5, 2006
0
1
0
WDTRIS
RO
RO
16
0
0
0

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