LM3S301 Luminary Micro, Inc, LM3S301 Datasheet - Page 278

• Manufacturer Part Number: LM3S301
• Description: Lm3s301 Arm Microcontroller
• Manufacturer: Luminary Micro, Inc

Synchronous Serial Interface (SSI)
278
Reset
Reset
Type
Type
SSI Data (SSIDR)
Offset 0x008
Bit/Field
R/W
RO
31:16
31
15
0
0
15:0
Register 3: SSI Data (SSIDR), offset 0x008
SSIDR is the data register and is 16-bits wide. When SSIDR is read, the entry in the receive FIFO
(pointed to by the current FIFO read pointer) is accessed. As data values are removed by the SSI
receive logic from the incoming data frame, they are placed into the entry in the receive FIFO
(pointed to by the current FIFO write pointer).
When SSIDR is written to, the entry in the transmit FIFO (pointed to by the write pointer) is written
to. Data values are removed from the transmit FIFO one value at a time by the transmit logic. It is
loaded into the transmit serial shifter, then serially shifted out onto the SSITx pin at the
programmed bit rate.
When a data size of less than 16 bits is selected, the user must right-justify data written to the
transmit FIFO. The transmit logic ignores the unused bits. Received data less than 16 bits is
automatically right-justified in the receive buffer.
When the SSI is programmed for MICROWIRE frame format, the default size for transmit data is
eight bits (the most significant byte is ignored). The receive data size is controlled by the
programmer. The transmit FIFO and the receive FIFO are not cleared even when the SSE bit in the
SSICR1 register is set to zero. This allows the software to fill the transmit FIFO before enabling the
SSI.
R/W
RO
30
14
0
0
reserved
Name
DATA
R/W
RO
29
13
0
0
R/W
RO
28
12
0
0
R/W
Type
RO
R/W
27
11
0
0
RO
R/W
RO
26
10
0
0
Reset
R/W
RO
25
0
0
0
9
0
Preliminary
R/W
RO
24
0
8
0
Description
Reserved bits return an indeterminate value, and should
never be changed.
SSI Receive/Transmit Data
A read operation reads the receive FIFO. A write operation
writes the transmit FIFO.
Software must right-justify data when the SSI is programmed
for a data size that is less than 16 bits. Unused bits at the top
are ignored by the transmit logic. The receive logic
automatically right-justifies the data.
reserved
DATA
R/W
RO
23
0
7
0
R/W
RO
22
0
6
0
R/W
RO
21
0
5
0
R/W
RO
20
0
4
0
R/W
RO
19
0
3
0
R/W
RO
18
0
2
0
R/W
RO
17
0
1
0
July 5, 2006
R/W
RO
16
0
0
0