LM3S301 Luminary Micro, Inc, LM3S301 Datasheet - Page 97

• Manufacturer Part Number: LM3S301
• Description: Lm3s301 Arm Microcontroller
• Manufacturer: Luminary Micro, Inc

July 5, 2006
Reset
Reset
Type
Type
Bit/Field
31:8
Usec Reload (USECRL)
Offset 0x140
7:0
RO
RO
31
15
0
0
Register 3: USec Reload (USECRL), offset 0x140
Note:
This register is provided as a means of creating a 1 μs tick divider reload value for the flash
controller. The internal flash has specific minimum and maximum requirements on the length of
time the high voltage write pulse can be applied. It is required that this register contain the
operating frequency (in MHz -1) whenever the flash is being erased or programmed. The user is
required to change this value if the clocking conditions are changed for a flash erase/program
operation.
RO
RO
30
14
0
0
reserved
USEC
Name
RO
RO
Offset is relative to System Control base address of 0x400FE000
29
13
0
0
reserved
RO
RO
28
12
0
0
Type
R/W
RO
RO
RO
27
11
0
0
RO
RO
26
10
0
0
Reset
0x13
RO
RO
25
0
9
0
0
Preliminary
RO
RO
24
0
8
0
Description
Reserved bits return an indeterminate value, and should
never be changed.
MHz -1 of the controller clock when the flash is being
erased or programmed.
USEC should be set to 0x13 (19 MHz) whenever the flash is
being erased or programmed.
reserved
R/W
RO
23
0
7
0
R/W
RO
22
0
6
0
R/W
RO
21
0
5
0
R/W
RO
20
0
4
1
USEC
R/W
RO
19
0
3
0
LM3S301 Data Sheet
R/W
RO
18
0
2
0
R/W
RO
17
0
1
1
R/W
RO
16
0
0
1
97