LM3S301 Luminary Micro, Inc, LM3S301 Datasheet - Page 328
LM3S301
Manufacturer Part Number
LM3S301
Description
Lm3s301 Arm Microcontroller
Manufacturer
Luminary Micro, Inc
Datasheet
1.LM3S301.pdf
(366 pages)
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Pulse Width Modulator (PWM)
328
Reset
Reset
Type
Type
Bit Field
PWMn Raw Interrupt Status (PWMnRIS)
RO
RO
31
15
0
0
31:6
5
4
3
2
1
0
Register 12: PWM0 Raw Interrupt Status (PWM0RIS), offset 0x048
This register provides the current set of interrupt sources that are asserted, regardless of whether
they cause an interrupt to be asserted to the controller. Bits set to 1 indicate the latched events
that have occurred; a 0 bit indicates that the event in question has not occurred.
RO
RO
30
14
0
0
IntCntLoad
IntCntZero
IntCmpBD
IntCmpBU
IntCmpAD
IntCmpAU
reserved
Name
RO
RO
29
13
0
0
RO
RO
28
12
0
0
Type
RO
RO
RO
RO
RO
RO
RO
RO
RO
27
11
0
0
reserved
RO
RO
26
10
0
0
Reset
RO
RO
25
0
9
0
0
0
0
0
0
0
0
Preliminary
RO
RO
24
0
8
0
reserved
Description
Reserved bits return an indeterminate value, and should
never be changed.
Indicates that the counter has matched the comparator B
value while counting down.
Indicates that the counter has matched the comparator B
value while counting up.
Indicates that the counter has matched the comparator A
value while counting down.
Indicates that the counter has matched the comparator A
value while counting up.
Indicates that the counter has matched the PWMnLOAD
register.
Indicates that the counter has matched 0.
RO
RO
23
0
7
0
RO
RO
22
0
6
0
IntCmpBD
RO
RO
21
0
5
0
IntCmpBU
RO
RO
20
0
4
0
IntCmpAD
RO
RO
19
0
3
0
IntCmpAU
RO
RO
18
0
2
0
IntCntLoad
RO
RO
17
July 5, 2006
0
1
0
IntCntZero
RO
RO
16
0
0
0
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