LM3S301 Luminary Micro, Inc, LM3S301 Datasheet - Page 218
LM3S301
Manufacturer Part Number
LM3S301
Description
Lm3s301 Arm Microcontroller
Manufacturer
Luminary Micro, Inc
Datasheet
1.LM3S301.pdf
(366 pages)
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Analog-to-Digital Converter (ADC)
218
Reset
Reset
Type
Type
Bit/Field
ADC Sample Sequence FIFO 0 Status (ADCSSFSTAT0)
Offset 0x04C
31:13
RO
RO
31
15
0
0
11:9
7:4
3:0
12
8
reserved
Register 13: ADC Sample Sequence FIFO 0 Status (ADCSSFSTAT0), offset 0x04C
This register provides a window into the Sample Sequencer FIFO 0, providing full/empty status
information as well as the positions of the head and tail pointers. The reset value of 0x100
indicates an empty FIFO.
RO
RO
30
14
0
0
reserved
reserved
EMPTY
Name
HPTR
TPTR
FULL
RO
RO
29
13
0
0
FULL
RO
RO
28
12
0
0
Type
RO
RO
RO
RO
RO
RO
RO
RO
27
11
0
0
reserved
RO
RO
26
10
0
0
Reset
0
0
0
1
0
0
RO
RO
25
0
9
0
Preliminary
EMPTY
Description
Reserved bits return an indeterminate value, and should never
be changed.
When set, indicates that the FIFO is currently full.
Reserved bits return an indeterminate value, and should never
be changed.
When set, indicates that the FIFO is currently empty.
This field contains the current "head" pointer index for the
FIFO, that is, the next entry to be written.
This field contains the current "tail" pointer index for the FIFO,
that is, the next entry to be read.
RO
RO
24
0
8
1
reserved
RO
RO
23
0
7
0
RO
RO
22
0
6
0
HPTR
RO
RO
21
0
5
0
RO
RO
20
0
4
0
RO
RO
19
0
3
0
RO
RO
18
0
2
0
TPTR
RO
RO
17
July 5, 2006
0
1
0
RO
RO
16
0
0
0
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