dac1628d1g25 NXP Semiconductors, dac1628d1g25 Datasheet - Page 39
dac1628d1g25
Manufacturer Part Number
dac1628d1g25
Description
Dual 16-bit Dac Jesd204b Interface Up To 1.25 Gsps; X2, X4 And X8 Interpolating
Manufacturer
NXP Semiconductors
Datasheet
1.DAC1628D1G25.pdf
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Table 18.
Default values are shown highlighted.
Table 19.
Default values are shown highlighted.
DAC1628D1G25
Objective data sheet
Bit
7
6
2
1
0
Bit
7
6
5
4 to 2
Symbol
3W_SPI
SPI_RST
CODING
IC_PON
GAP_PON
Symbol
NCO_ON
NCO_LP_SEL
INV_SIN_SEL
MODULATION[2:0]
10.17.1.2 Page x00 bit definition detailed description
Register COMMON (address 00h) bit description
Register TXCFG (address 01h) bit description
The tables in this section contain detailed descriptions of the page x00 registers.
Access
R/W
R/W
R/W
R/W
R/W
Access
R/W
R/W
R/W
R/W
All information provided in this document is subject to legal disclaimers.
Rev. 1.1 — 10 October 2011
Value
0
1
0
1
0
1
0
1
0
1
Value
0
1
0
1
0
1
000
001
010
011
100
others
Dual 16-bit DAC: JESD204B interface; up to 1.25 Gsps
Description
serial interface bus type
serial interface reset
coding of input word
IC power control
internal band gap power control
Description
NCO low power selection
modulation
NCO
inverse (sin x) / x function selection
4-wire SPI
3-wire SPI
no reset
performs a reset on all registers except address 00h
two’s complement coding
unsigned format
all circuits (digital and analog, except SPI) are in
power-down
all circuits (digital and analog, except SPI) are
switched on
band gap is power-down
internal band gap references are switched on
NCO disabled, the NCO phase is reset to 0
NCO enabled
low power NCO disabled
low power NCO enabled (frequency and phase
given by the five MSB of the registers 06h and 08h,
respectively)
disabled
enabled
dual DAC: no modulation
positive upper single sideband upconversion
positive lower single sideband upconversion
negative upper single sideband upconversion
negative lower single sideband upconversion
not defined
DAC1628D1G25
© NXP B.V. 2011. All rights reserved.
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