dac1628d1g25 NXP Semiconductors, dac1628d1g25 Datasheet - Page 63
dac1628d1g25
Manufacturer Part Number
dac1628d1g25
Description
Dual 16-bit Dac Jesd204b Interface Up To 1.25 Gsps; X2, X4 And X8 Interpolating
Manufacturer
NXP Semiconductors
Datasheet
1.DAC1628D1G25.pdf
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NXP Semiconductors
DAC1628D1G25
Objective data sheet
Fig 26. Page x03: RX digital lane processing
PAGE x03: RX DIGITAL LANE PROCESSING
10.17.4 Page x03: RX Digital Lane Processing (DLP)
LANE POLARITY
Clock alignment
POL_LN0
POL_LN1
POL_LN2
POL_LN3
SR_CA_LN0
SR_CA_LN1
SR_CA_LN2
SR_CA_LN3
SYNC_POL
This page specifies the configuration of the digital lane processing.
Word alignment
SYNC_INIT_LVL
SR_SWA_LN0
SR_SWA_LN1
SR_SWA_LN2
SR_SWA_LN3
WORD_SWP_LN0
WORD_SWP_LN1
WORD_SWP_LN2
WORD_SWP_LN3
SWAP WORD
SYNC B
MSB
MSB
MSB
MSB
LSB
LSB
LSB
LSB
All information provided in this document is subject to legal disclaimers.
SR_CTRL_LN0
SR_CTRL_LN1
SR_CTRL_LN2
SR_CTRL_LN3
Lane controller
SYNC/REINIT
SEL_REINIT
SEL_SYNC
INIT_DESCR_LN0
INIT_DESCR_LN1
INIT_DESCR_LN2
INIT_DESCR_LN3
DESCRAMBLER
DESCR LANE0
DESCR LANE1
DESCR LANE2
DESCR LANE3
DESCR_EN
Rev. 1.1 — 10 October 2011
Soft reset
10b/8b decoder
SR_DEC_LN0
SR_DEC_LN1
SR_DEC_LN2
SR_DEC_LN3
Dual 16-bit DAC: JESD204B interface; up to 1.25 Gsps
A
LANE_SEL_LN0
LANE_SEL_LN1
LANE_SEL_LN2
LANE_SEL_LN3
A
SEL_ILA
SWAP LANES
A
SR_ILA
A
DYN_ALIGN_EN
ILA
SEL_LOCK:
ILA starts after all lanes locked
ILA starts after one of the lanes is locked
ILA starts after all lane 0 locked
ILA starts after all lane 1 locked
ILA starts after all lane 2 locked
ILA starts after all lane 3 locked
ILA LANE 0
INIT_ILA_BUFPTR_LN0
REINIT_ILA_LN0
RESYNC_O_L_LN0
ILA LANE 1
INIT_ILA_BUFPTR_LN1
REINIT_ILA_LN1
RESYNC_O_L_LN1
ILA LANE 2
INIT_ILA_BUFPTR_LN2
REINIT_ILA_LN2
RESYNC_O_L_LN2
ILA LANE 3
INIT_ILA_BUFPTR_LN3
REINIT_ILA_LN3
RESYNC_O_L_LN3
SUP_LN_SYNC
SR_SCR_LN0
SR_SCR_LN1
SR_SCR_LN2
SR_SCR_LN3
Scrambler
ILA
DAC1628D1G25
NAD_ERR_CORR
SEL_KOUT_UNEXP_LN
SEL_NIT_ERR_LN
IGN_ERR
FRAME ASSEMBLY
Error handling
M parameters
L parameters
F parameters
M
L
F
© NXP B.V. 2011. All rights reserved.
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