mc68hc908mr24 Freescale Semiconductor, Inc, mc68hc908mr24 Datasheet - Page 118

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mc68hc908mr24

Manufacturer Part Number
mc68hc908mr24
Description
M68hc08 Microcontrollers
Manufacturer
Freescale Semiconductor, Inc
Datasheet
Clock Generator Module (CGM)
Advance Information
118
NOTE:
For proper operation,
Exceeding the recommended maximum bus frequency or VCO
frequency can crash the MCU.
5. Calculate the bus frequency, f
6. If the calculated f
7. Using the value 4.9152 MHz for f
8. Calculate the VCO center-of-range frequency, f
9. Program the PLL registers accordingly:
f
application, select another f
range multiplier, L. The linear range multiplier controls the
frequency range of the PLL.
or-range frequency is the midpoint between the minimum and
maximum frequencies attainable by the PLL.
BUSDES
a. In the upper four bits of the PLL programming register (PPG),
b. In the lower four bits of the PLL programming register (PPG),
Clock Generator Module (CGM)
Example: f
program the binary equivalent of N.
program the binary equivalent of L.
Example: N =
Example: L =
.
VRS
f
VRS
BUS
32 MHz
4.9152 MHz
L = round
4 MHz
= 7 x 4.9152 MHz = 34.4 MHz
– f
is not within the tolerance limits of your
32 MHz
f
VRS
f
VCLK
BUS
= L x f
BUSDES
= 8 MHz
=
|
BUS
(
f
VCLK
f
4
f
f
VCLK
NOM
NOM
NOM
= 7 MHz
NOM
, and compare f
2
or another f
, calculate the VCO linear
)
MC68HC908MR24
Freescale Semiconductor
RCLK
VRS
BUS
. The center-
.
with
Rev. 4.1

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