mc68hc908mr24 Freescale Semiconductor, Inc, mc68hc908mr24 Datasheet - Page 59

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mc68hc908mr24

Manufacturer Part Number
mc68hc908mr24
Description
M68hc08 Microcontrollers
Manufacturer
Freescale Semiconductor, Inc
Datasheet
4.4 FLASH Control Register
MC68HC908MR24 — Rev. 4.1
Freescale Semiconductor
NOTE:
Address:
A security feature prevents viewing of the FLASH contents.
The FLASH control register controls FLASH program, erase, and margin
read operations.
FDIV1 — Frequency Divide Control Bit
FDIV0 — Frequency Divide Control Bit
BLK1— Block Erase Control Bit
BLK0 — Block Erase Control Bit
1. No security feature is absolutely secure. However, Freescale’s strategy is to make reading or
copying the FLASH difficult for unauthorized users.
Reset:
Read:
Write:
This read/write bit together with FDIV0 selects the factor by which the
charge pump clock is divided from the system clock. See
Charge Pump Frequency
This read/write bit together with FDIV1 selects the factor by which the
charge pump clock is divided from the system clock. See
Charge Pump Frequency
This read/write bit together with BLK0 allows erasing of blocks of
varying size. See
available block sizes.
This read/write bit together with BLK1 allows erasing of blocks of
varying size. See
available block sizes.
$FE08
FDIV1
Bit 7
0
Figure 4-1. FLASH Control Register (FLCR)
FDIV0
FLASH Memory
6
0
4.6 FLASH Erase Operation
4.6 FLASH Erase Operation
BLK1
5
0
Control.
Control.
BLK0
4
0
HVEN
3
0
MARGIN
2
0
for a description of
for a description of
Advance Information
ERASE
FLASH Memory
1
0
1
4.5 FLASH
4.5 FLASH
PGM
Bit 0
0
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