mc68hc908mr24 Freescale Semiconductor, Inc, mc68hc908mr24 Datasheet - Page 183
mc68hc908mr24
Manufacturer Part Number
mc68hc908mr24
Description
M68hc08 Microcontrollers
Manufacturer
Freescale Semiconductor, Inc
Datasheet
1.MC68HC908MR24.pdf
(406 pages)
- Current page: 183 of 406
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MC68HC908MR24 — Rev. 4.1
Freescale Semiconductor
FMODE3 — Fault Mode Selection for Fault Pin 3 Bit
FINT2 — Fault 2 Interrupt Enable Bit
FMODE2 — Fault Mode Selection for Fault Pin 2 Bit
FINT1 — Fault 1 Interrupt Enable Bit
Pulse-Width Modulator for Motor Control (PWMMC)
This read/write bit allows the user to select between automatic and
manual mode faults. For further descriptions of each mode,
see
This read/write bit allows the CPU interrupt caused by faults on fault
pin 2 to be enabled. The fault protection circuitry is independent of this
bit and will always be active. If a fault is detected, the PWM pins will
still be disabled according to the disable mapping register.
This read/write bit allows the user to select between automatic and
manual mode faults. For further descriptions of each mode, see
Fault
This read/write bit allows the CPU interrupt caused by faults on fault
pin 1 to be enabled. The fault protection circuitry is independent of this
bit and will always be active. If a fault is detected, the PWM pins will
still be disabled according to the disable mapping register.
1 = Automatic mode
0 = Manual mode
1 = Fault pin 2 will cause CPU interrupts.
0 = Fault pin 2 will not cause CPU interrupts.
1 = Automatic mode
0 = Manual mode
1 = Fault pin 1 will cause CPU interrupts.
0 = Fault pin 1 will not cause CPU interrupts.
9.7 Fault
Protection.
(automatic versus manual mode)
(automatic versus manual mode)
Protection.
Pulse-Width Modulator for Motor Control (PWMMC)
Advance Information
9.7
183
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