mpc8560vt667jb Freescale Semiconductor, Inc, mpc8560vt667jb Datasheet - Page 35

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mpc8560vt667jb

Manufacturer Part Number
mpc8560vt667jb
Description
Mpc8560 Powerquicc Iii Integrated Communications Processor
Manufacturer
Freescale Semiconductor, Inc
Datasheet
Freescale Semiconductor
Input setup to local bus clock (except
LUPWAIT)
LUPWAIT input setup to local bus clock
Input hold from local bus clock (except
LUPWAIT)
LUPWAIT input hold from local bus clock
LALE output transition to LAD/LDP output
transition (LATCH hold time)
Local bus clock to output valid (except
LAD/LDP and LALE)
Local bus clock to data valid for LAD/LDP
Local bus clock to address valid for LAD
Local bus clock to LALE assertion
Output hold from local bus clock (except
LAD/LDP and LALE)
Output hold from local bus clock for
LAD/LDP
Local bus clock to output high Impedance
(except LAD/LDP and LALE)
Parameter
Table 31. Local Bus General Timing Parameters—DLL Enabled (continued)
MPC8560 Integrated Processor Hardware Specifications, Rev. 4.2
TSEC2_TXD[6:5] = 00
TSEC2_TXD[6:5] = 00
TSEC2_TXD[6:5] = 11
TSEC2_TXD[6:5] = 00
TSEC2_TXD[6:5] = 11
TSEC2_TXD[6:5] = 11
TSEC2_TXD[6:5] = 00
TSEC2_TXD[6:5] = 11
TSEC2_TXD[6:5] = 00
TSEC2_TXD[6:5] = 11
TSEC2_TXD[6:5] = 00
TSEC2_TXD[6:5] = 11
POR Configuration
(default)
(default)
(default)
(default)
(default)
(default)
Symbol
t
t
t
t
t
t
t
t
t
t
t
t
LBKHOV1
LBKHOV2
LBKHOV3
LBKHOV4
LBKHOX1
LBKHOX2
LBKHOZ1
LBIVKH1
LBIVKH2
LBIXKH1
LBIXKH2
LBOTOT
1
Min
1.8
1.7
0.5
1.0
1.5
0.7
1.6
0.7
1.6
Max
2.0
3.5
2.2
3.7
2.3
3.8
2.3
2.5
3.8
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Local Bus
Notes
4, 5, 8
4, 5, 8
4, 5
4, 5
4, 8
4, 8
4, 8
4, 8
4, 8
4, 8
7, 9
6
35

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