mpc8560vt667jb Freescale Semiconductor, Inc, mpc8560vt667jb Datasheet - Page 97

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mpc8560vt667jb

Manufacturer Part Number
mpc8560vt667jb
Description
Mpc8560 Powerquicc Iii Integrated Communications Processor
Manufacturer
Freescale Semiconductor, Inc
Datasheet
17.8.1 Termination of Unused Signals
If the JTAG interface and COP header will not be used, Freescale recommends the following connections:
Freescale Semiconductor
TRST should be tied to HRESET through a 0 kΩ isolation resistor so that it is asserted when the
system reset signal (HRESET) is asserted, ensuring that the JTAG scan chain is initialized during
the power-on reset flow. Freescale recommends that the COP header be designed into the system
as shown in
in case a JTAG interface may need to be wired onto the system in future debug situations.
Tie TCK to OV
reading incorrect data into the device.
No connection is required for TDI, TMS, or TDO.
Figure
DD
MPC8560 Integrated Processor Hardware Specifications, Rev. 4.2
COP_CHKSTP_OUT
through a 10 kΩ resistor. This will prevent TCK from changing state and
61. If this is not possible, the isolation resistor will allow future access to TRST
COP_HRESET
COP_SRESET
Figure 60. COP Connector Physical Pinout
COP_TDO
COP_TMS
COP_TCK
COP_TDI
NC
13
15
11
1
1
3
5
7
9
No pin
KEY
10
12
16
2
4
6
8
NC
COP_TRST
COP_VDD_SENSE
COP_CHKSTP_IN
NC
NC
GND
System Design Information
97

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