ppc8572elpxavnd Freescale Semiconductor, Inc, ppc8572elpxavnd Datasheet - Page 22

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ppc8572elpxavnd

Manufacturer Part Number
ppc8572elpxavnd
Description
Mpc8572e Powerquicc Iii Integrated Communications Processors
Manufacturer
Freescale Semiconductor, Inc
Datasheet
DDR2 and DDR3 SDRAM Controller
Figure 3
6.2.2
Table 17
22
At recommended operating conditions with GV
MDQS[n]
MDQ[x]
MCK[n] cycle time
ADDR/CMD output setup with respect to MCK
800 MHz
667 MHz
533 MHz
400 MHz
ADDR/CMD output hold with respect to MCK
800 MHz
667 MHz
533 MHz
400 MHz
MCS[n] output setup with respect to MCK
800 MHz
667 MHz
533 MHz
MCK[n]
MCK[n]
shows the DDR2 and DDR3 SDRAM interface input timing diagram.
contains the output AC timing targets for the DDR2 and DDR3 SDRAM interface.
DDR2 and DDR3 SDRAM Interface Output AC Timing Specifications
Table 17. DDR2 and DDR3 SDRAM Interface Output AC Timing Specifications
MPC8572E PowerQUICC III Integrated Processor Hardware Specifications, Rev. 4
Parameter
Figure 3. DDR2 and DDR3 SDRAM Interface Input Timing Diagram
DD
t
t
MCK
DISKEW
of 1.8 V ± 5% for DDR2 or 1.5 V ± 5% for DDR3.
Symbol
t
t
t
DDKHAS
DDKHAX
DDKHCS
t
MCK
D0
1
D1
0.917
0.917
0.917
1.10
1.48
1.95
1.10
1.48
1.95
1.10
1.48
Min
2.5
t
DISKEW
t
DISKEW
Max
5
Freescale Semiconductor
Unit
ns
ns
ns
ns
Notes
2
3
3
3

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