saa6712e NXP Semiconductors, saa6712e Datasheet - Page 29
saa6712e
Manufacturer Part Number
saa6712e
Description
Xga Rgb To Tft Graphics Engine
Manufacturer
NXP Semiconductors
Datasheet
1.SAA6712E.pdf
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Philips Semiconductors
1999 Aug 25
Clock distribution
C
Memory clock generation
Panel clock generation
PLL activation
PLL post-divider precision
PLL pre-divider precision
PLL post-divider activation
PLL pre-divider activation
External memory clock multiplexer
P
Pre-divider p-counter programming
P
Pre-divider n-counter programming
P
Pre-divider n-counter offset programming
P
Post-divider p-counter programming
P
Post-divider n-counter programming
P
Post-divider n-counter offset programming
RE
RE
RE
OST
OST
OST
LOCK MULTIPLEXING
XGA RGB to TFT graphics engine
Memory clock is taken from pin MCLKI
Memory clock is
Panel clock is equal system clock
Panel clock is generated by PLL clock and post-divider
PLL disabled
PLL enabled
1
1
1
1
PLL post-divider disabled
PLL post-divider enabled
PLL pre-divider disabled
PLL pre-divider enabled
Enable memory clock
Use system clock as external memory clock
2
2
2
2
-
-
-
DIVIDER P
DIVIDER N
DIVIDER N
-
-
-
clock precision disabled
clock precision enabled
clock precision disabled
clock precision enabled
DIVIDER P
DIVIDER N
DIVIDER N
-
-
-
COUNTER
COUNTER
OFFSET
-
-
-
COUNTER
COUNTER
OFFSET
1
2
PLL clock
NAME
29
SUBADDRESS
26
27
28
29
30
31
32
R/W
W
W
W
W
W
W
W
Preliminary specification
D0
D1
D2
D3
D4
D5
D6
D7
D7 to D0
D7 to D0
D3 to D0
D7 to D0
D7 to D0
D3 to D0
logic 0
logic 1
logic 0
logic 1
logic 0
logic 1
logic 0
logic 1
logic 0
logic 1
logic 0
logic 1
logic 0
logic 1
logic 0
logic 1
SAA6712E
DATA
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