saa6712e NXP Semiconductors, saa6712e Datasheet - Page 56
saa6712e
Manufacturer Part Number
saa6712e
Description
Xga Rgb To Tft Graphics Engine
Manufacturer
NXP Semiconductors
Datasheet
1.SAA6712E.pdf
(64 pages)
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Philips Semiconductors
11 TIMING CHARACTERISTICS
V
1999 Aug 25
System clock input at pin CLK
f
RGB sample clock input at pin VCLK
f
Input signals at pins VVS, VHS, VPA7 to VPA0, VPB7 to VPB0, VPC7 to VPC0, VPD7 to VPD0, VPE7 to VPE0,
and VPF7 to VPF0 with respect to signal at pin VCLK
t
t
Output signals at pins CLAMP and GAINC with respect to signal at pin VCLK; note 1
t
t
Output clock to panel at pin PCLK
f
Output signals at pins PVS, PHS, PDE, PAR7 to PAR0, PAG7 to PAG0, PAB7 to PAB0, PBR7 to PBR0,
PBG7 to PBG0, and PBB7 to PBB0 with respect to signal at pin PCLK; note 2
t
t
Overlay port clock output at pin OVCLK
f
Input signals at pins OVACT, OVA2 to OVA0, and OVB2 to OVB0 with respect to signal at pin OVCLK
t
t
Output signals at pins OVVS and OVHS with respect to signal at pin OVCLK; note 1
t
t
CLK
VCLK
su
h
h
PD
PCLK
h
PD
OVCLK
su(i)
h(i)
h(o)
PD(o)
DDD
SYMBOL
XGA RGB to TFT graphics engine
= 3.0 to 3.6 V; V
clock frequency
duty factor
clock frequency
duty factor
set-up time
hold time
hold time
propagation delay
clock frequency
duty factor
hold time
propagation delay
clock frequency
duty factor
set-up time
hold time
hold time
propagation delay
pins PVS, PHS and PDE
all other pins
pins PVS, PHS and PDE
all other pins
DD(PLL)
PARAMETER
= 3.1 to 3.5 V; T
amb
single ADC mode
double ADC mode
= 25 C; see Fig.18; unless otherwise specified.
CONDITIONS
56
24
40
25
12.5
40
7.0
8
40
0
40
6.0
4.0
0.5
3.0
1.0
MIN.
50
50
50
50
TYP.
Preliminary specification
70
60
150
75
60
13
80
60
1
3.5
80
60
1.0
SAA6712E
MAX.
MHz
%
MHz
MHz
%
ns
ns
ns
ns
MHz
%
ns
ns
ns
ns
MHz
%
ns
ns
ns
ns
UNIT
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