tmp88cu74 TOSHIBA Semiconductor CORPORATION, tmp88cu74 Datasheet - Page 100
tmp88cu74
Manufacturer Part Number
tmp88cu74
Description
Cmos 8-bit Microcontroller
Manufacturer
TOSHIBA Semiconductor CORPORATION
Datasheet
1.TMP88CU74.pdf
(132 pages)
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SIOF
SO0 pin
0
b.
pin
Figure 2.10.22 Transmitted Data Hold Time at End of Transmit
receive mode. Data is received from the SI0 pin to the shift register in
synchronous with the serial clock, starting from the least significant bit (LSB).
When the 8-bit data is received, the data is transferred from the shift register to
the SBIDBR. The INTSBI (buffer full) interrupt request is generated to request of
reading the received data. The data is then read from the SBIDBR by the
interrupt service program.
function will be initiated until the received data is read from the SBIDBR.
clock pulse provided externally, the received data should be read before new data
is transferred to the SBIDBR. If the received data is not read, further data to be
received is canceled. The maximum transfer speed when the external clock is used
is determined by the delay time between the time when an interrupt request is
generated and the time when received data is read.
service program or setting the SIOINH to “1”. When the SIOS is cleared, received
data is transferred to the SBIDBR in complete blocks. The received mode ends
when the transfer is complete. In order to confirm if data is surely received by the
program, set the SIOF (bit 3 in SBIDBR) to be sensed. The SIOF is cleared to “0”
when receiving is complete. After confirming that receiving has ended, the last
data is read. When the SIOINH is set, receiving data stops. The SIOF turns “0”
(the received data becomes invalid, therefore no need to read it).
8-bit receive mode
Note: When the transfer mode is switched, the SBIDBR contents are lost. In case
Set a control register to a receive mode and the SIOS to “1” for switching to a
When the internal clock is used, the serial clock will stop and automatic-wait
When the external clock is used, since shift operation is synchronized with the
Receiving data is ended by clearing the SIOS to “0” by the buffer full interrupt
that the mode needs to be switched, conclude receiving data by clearing the
SIOS to “0”, read the last data, and then switch the mode.
Bit6
88CU74-100
Bit7
t
SODH
= 3.5/fc [s] (min) (In NORMAL mode, IDLE mode)
TMP88CU74
2007-10-19
2003-02-17
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