tmp88cu74 TOSHIBA Semiconductor CORPORATION, tmp88cu74 Datasheet - Page 76

• Manufacturer Part Number: tmp88cu74
• Description: Cmos 8-bit Microcontroller
• Manufacturer: TOSHIBA Semiconductor CORPORATION

Source clock
Up-counter
TC3 pin input
TREG3A
TREG3B
INTTC3 interrupt
Reading TREG3A
(3) Capture mode
k − 2
which can be used in decoding the remote control signals or distinguishing AC 50/60
Hz, etc. The counter is free running by the internal clock. On the rising (falling) edge of
the TC3 pin input, the current contents of counter is loaded into TREG3A, then the
up-counter is cleared to “0” and an INTTC4 interrupt is generated. On the falling
(rising) edge of the TC3 pin input, the current contents of the counter is loaded into
TREG3B. In this case, counting continues. On the next rising (falling) edge of the TC3
pin input, the current contents of counter are loaded into TREG3A, then the counter is
cleared again and an interrupt is generated. If the counter overflows before the edge is
detected. FF
is generated. During interrupt processing, it can be determined whether or not there is
an overflow by checking whether or not the TREG3A value is FF
interrupt (capture to TREG3A, or overflow detection) is generated, capture and
overflow detection are halted until TREG3A has been read out; however, the counter
continues. As reading out TREG3A resumes capture/overflow detection, TREG3B must
be beforehand read out.
The pulse width, period and duty of the TC3 pin input are measured in this mode,
k−1 k 0
Figure 2.8.3 Capture Mode Timing Chart (at INT4ES = 0)
Capture
k
H
1
is set into TREG3A, and the counter is cleared and an INTTC3 interrupt
m−1
m
m
88CU74-76
m+1
n−1
n
0
Capture
n
1
2
3
FE
FF
FE
0
H
FF (Overflow)
Overflow
. Also, after an
1
TMP88CU74
2007-10-19
2003-02-17
2
3