tmp88cu74 TOSHIBA Semiconductor CORPORATION, tmp88cu74 Datasheet - Page 38

• Manufacturer Part Number: tmp88cu74
• Description: Cmos 8-bit Microcontroller
• Manufacturer: TOSHIBA Semiconductor CORPORATION

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Instruction
execution
RESET
1.6.2
1.6.3
1.6.4
output
Note 1: Address “a” is in the SFR or on-chip RAM space.
Note 2: During reset release, reset vector “r” is read out, and an instruction at address “r” is fetched and decoded.
Address-trap-reset
fetch an instruction from the on-chip RAM or the SFR area, an address-trap-reset will be
generated. Then, the
(0.64 to 1.92 µs at 12.5 MHz).
Watchdog Timer Reset
System-clock-reset
SYSCK = 0, or clearing XEN to “0” when SYSCK = 1 stops system clock, and causes the
microcomputer to deadlock. This can be prevented by automatically generating a reset
signal whenever XEN = XTEN = 0 is detected to continue the oscillation. Then, the
pin output goes low from high-impedance. The reset time is about 8/fc to 24/fc [s] (0.64 to
1.92 µs at 12.5 MHz).
If the CPU should start looping for some cause such as noise and an attempt be made to
Refer to Section “2.4 Watchdog Timer”.
Clearing both XEN and XTEN (bits 7 and 6 in SYSCR2) to “0”, clearing XEN to “0” when
JP
a
Address-trap is occurred
RESET
8/fc to 24/fc [s]
(“L” output)
Figure 1.6.2 Address-trap-reset
pin output will go low. The reset time is about 8/fc to 24/fc [s]
88CU74-38
4/fc to 12/fc [s]
(H’)
Reset release
20/fc [s]
Instruction at address r
TMP88CU74
2007-10-19
2003-02-17
RESET