tmp88cu74 TOSHIBA Semiconductor CORPORATION, tmp88cu74 Datasheet - Page 25

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tmp88cu74

Manufacturer Part Number
tmp88cu74
Description
Cmos 8-bit Microcontroller
Manufacturer
TOSHIBA Semiconductor CORPORATION
Datasheet
1.5
Internal/
External
External
External
External
External
External
Internal
Internal
Internal
Internal
Internal
Internal
Internal
Internal
Internal
Internal
Interrupt Controller
Nested interrupt control with priorities is also possible. Two of the internal sources are pseudo
non-maskable interrupts; the remainder are all maskable interrupts.
Each interrupt vector is independent.
to accept the interrupt. The acceptance of maskable interrupts can be selectively enabled and
disabled by the program using the interrupt master enable flag (IMF) and the individual
interrupt enable flags (EF). When two or more interrupts are generated simultaneously, the
interrupt is accepted in the highest priority order as determined by the hardware. Figure 1.5.1
shows the interrupt controller.
Note: Before you change each enable flag (EF) and/or each interrupt latch (IL), be sure to clear the
The TMP88CU74 each have a total of 15 interrupt sources: 6 externals and 9 internals.
Interrupt latches (IL) that hold the interrupt requests are provided for interrupt sources.
The interrupt latch is set to “1” when an interrupt request is generated and requests the CPU
(Reset)
INTSW
INTWDT
INT0
INTTC1
INT1
INTTBT
INT2
INTTC3
INTSIO1
INTTC4
INT3
INTKEY
INTSIO2
INTTC2
INT5
interrupt master enable flag (IMF) to “0” (to disable interrupts).
If the individual enable flags (EF) and interrupt latches (IL) are set under conditions other
than the above, the proper operation cannot be guaranteed.
a. After a DI instruction is executed
b. When an interrupt is accepted, IMF is automatically cleared to “0”. However, to enable
Interrupt Source
nested interrupts, change EF and/or IL before setting IMF to “1” (to enable interrupts).
(Software interrupt)
(Watchdog Timer interrupt)
(External interrupt 0)
(16-bit TC1 interrupt)
(External interrupt 2)
(Time Base Timer interrupt)
(External interrupt 2)
(8-bit TC3 interrupt)
(Serial Interface1 interrupt)
(8-bit TC4 interrupt)
(External interrupt 3)
(Key scan interrupt)
(Serial interface2 interrupt)
(16-bit TC2 interrupt)
(External interrupt 5)
Table 1.5.1 Interrupt Sources
88CU74-25
Enable Condition
Non-Maskable
Pseudo
non-maskable
IMF = 1, INT0EN = 1
IMFKEF4 = 1
IMFKEF5 = 1
IMFKEF6 = 1
IMFKEF7 = 1
IMFKEF8 = 1
IMFKEF9 = 1
IMFKEF10 = 1
IMFKEF11 = 1
IMFKEF12 = 1
IMFKEF13 = 1
IMFKEF14 = 1
IMFKEF15 = 1
Interrupt
Latch
IL10
IL11
IL12
IL13
IL14
IL15
IL2
IL3
IL4
IL5
IL6
IL7
IL8
IL9
Address
FFFFCH
FFFECH
FFFDCH
FFFCCH
FFFE8H
FFFE4H
FFFE0H
FFFD8H
FFFD4H
FFFD0H
FFFC8H
FFFC4H
FFFC0H
Vector
FFFF8H
FFFF4H
FFFF0H
TMP88CU74
2007-10-19
2003-02-17
Priority
High
Low 15
10
11
12
13
14
1
2
3
4
5
6
7
8
9
0

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