p89v660 NXP Semiconductors, p89v660 Datasheet - Page 18

• Manufacturer Part Number: p89v660
• Description: P89v660/p89v662/p89v664 8-bit 80c51 5 V Low Power 16 Kb/32 Kb/64 Kb Flash Microcontroller With 512 B/1 Kb/2 Kb Ram, Dual I2c-bus, Spi
• Manufacturer: NXP Semiconductors

NXP Semiconductors
P89V660_662_664_2
Product data sheet
6.3.1 Flash organization
6.3.2 Features
6.3 Flash memory
The P89V660/662/664 program memory consists of a 16/32/64 kB block for user code.
The flash can be read or written in bytes and can be erased in 128 pages. A chip erase
function will erase the entire user code memory and its associated security bits. There are
three methods of erasing or programming the flash memory that may be used. First, the
flash may be programmed or erased in the end-user application by calling LOW-state
routines through a common IAP entry point. Second, the on-chip ISP bootloader may be
invoked. This ISP bootloader will, in turn, call LOW-state routines through the same
common entry point that can be used by the end-user application. Third, the flash may be
programmed or erased using the parallel method by using a commercially available
EPROM programmer which supports this device.
Fig 6. Power-on reset circuit
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Flash internal program memory with 128-byte page erase.
Internal Boot block, containing LOW-state IAP routines available to user code.
Boot vector allows user-provided flash loader code to reside anywhere in the flash
memory space, providing flexibility to the user.
Default loader providing ISP via the serial port, located in upper end of program
memory.
Programming and erase over the full operating voltage range.
Read/Programming/Erase using ISP/IAP.
Programming with industry-standard commercial programmers.
10000 typical erase/program cycles for each byte.
100 year minimum data retention.
V
Rev. 02 — 29 January 2008
DD
10 F
8.2 k
80C51 with 512 B/1 kB/2 kB RAM, dual I
C 2
C 1
RST
XTAL2
XTAL1
P89V660/662/664
V
002aaa543
DD
© NXP B.V. 2008. All rights reserved.
2
C-bus, SPI
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