p89v660 NXP Semiconductors, p89v660 Datasheet - Page 45

• Manufacturer Part Number: p89v660
• Description: P89v660/p89v662/p89v664 8-bit 80c51 5 V Low Power 16 Kb/32 Kb/64 Kb Flash Microcontroller With 512 B/1 Kb/2 Kb Ram, Dual I2c-bus, Spi
• Manufacturer: NXP Semiconductors

NXP Semiconductors
P89V660_662_664_2
Product data sheet
Fig 19. Timer 2 in Auto-reload mode (DCEN = 0)
OSC
T2 pin
6.6.2 Auto-reload mode (up or down-counter)
T2EX pin
In the 16-bit auto-reload mode, Timer 2 can be configured as either a timer or counter (via
C/T2 in T2CON), then programmed to count up or down. The counting direction is
determined by bit DCEN (Down-counter Enable) which is located in the T2MOD register
(see
counting up. If the DCEN bit is set, Timer 2 can count up or down depending on the value
of the T2EX pin.
Figure 19
In this mode, there are two options selected by bit EXEN2 in T2CON register. If
EXEN2 = 0, then Timer 2 counts up to 0FFFFH and sets the TF2 (Overflow Flag) bit upon
overflow. This causes the Timer 2 registers to be reloaded with the 16-bit value in
RCAP2L and RCAP2H. The values in RCAP2L and RCAP2H are preset by software
means.
Auto reload frequency when Timer 2 is counting up can be determined from this formula:
Where SupplyFrequency is either f
(C/T2 = 1).
If EXEN2 = 1, a 16-bit reload can be triggered either by an overflow or by a 1-to-0
transition at input T2EX. This transition also sets the EXF2 bit. The Timer 2 interrupt, if
enabled, can be generated when either TF2 or EXF2 is ‘1’.
Microcontroller’s hardware will need three consecutive machine cycles in order to
recognize falling edge on T2EX and set EXF2 = 1: in the first machine cycle pin T2EX has
to be sampled as ‘1’; in the second machine cycle it has to be sampled as ‘0’, and in the
third machine cycle EXF2 will be set to ‘1’.
6
------------------------------------------------------------------------------- -
65536
transition
detector
Table 34
SupplyFrequency
C/T2 = 0
C/T2 = 1
RCAP2H RCAP2L
shows Timer 2 counting up automatically (DCEN = 0).
and
EXEN2
Table
control
Rev. 02 — 29 January 2008
TR2
35). When reset is applied, DCEN = 0 and Timer 2 will default to
control
reload
osc
RCAP2L RCAP2H
80C51 with 512 B/1 kB/2 kB RAM, dual I
(8-bits)
TL2
(C/T2 = 0) or frequency of signal on T2 pin
(8-bits)
TH2
P89V660/662/664
EXF2
TF2
© NXP B.V. 2008. All rights reserved.
002aaa524
interrupt
timer 2
2
C-bus, SPI
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