am42bds6408h Meet Spansion Inc., am42bds6408h Datasheet - Page 33

• Manufacturer Part Number: am42bds6408h
• Description: Cmos 1.8 Volt-only Simultaneous Read/write, Burst Mode Flash Memory, And 8 Mbit 512 K X 16-bit Sram
• Manufacturer: Meet Spansion Inc.

Notes:
1. Upon power-up or hardware reset, the default setting is
2. RDY will default to being active with data when the Wait
It is recommended that the wait state command
sequence be written, even if the default wait state value
is desired, to ensure the device is set as expected. A
hardware reset will set the wait state to the default set-
ting.
Reduced Wait-state Handshaking Option
If the device is equipped with the reduced wait-state
handshaking option, the host system should set
address bits A14–A12 to 010 for the system/device to
execute at maximum speed.
Table 12
(wait states) for various conditions.
October 23, 2003
Table 11. Programmable Wait State Settings
seven wait states.
State Setting is set to a total initial access cycle of 2.
A14
0
0
0
0
1
1
1
1
describes the typical number of clock cycles
A13
0
0
1
1
0
0
1
1
A12
0
1
0
1
0
1
0
1
A D V A N C E
Total Initial Access
7 (default)
Reserved
Reserved
Cycles
2
3
4
5
6
Am42BDS6408H
I N F O R M A T I O N
Notes:
1. If the latched address is 3Eh or 3Fh (or an address offset
2. In the 8-, 16-, and 32-word burst modes, the address
3. Typical initial access cycles may vary depending on
Standard Handshaking Option
For optimal burst mode performance on devices with
the standard handshaking option, the host system
must set the appropriate number of wait states in the
flash device depending on the clock frequency.
6
22
28
43
6
28
35
53
6
18
22
33
45
6
23
28
42
56
–
–
–
–
Frequency
Frequency
Table 12. Wait States for Reduced wait-state
22 MHz
–
–
–
28 MHz
–
–
–
18 MHz
–
–
–
–
23 MHz
–
–
–
–
from either address by a multiple of 64), add two access
cycles to the values listed.
pointer does not cross 64-word boundaries (3Fh, or
addresses offset from 3Fh by a multiple of 64).
system margin requirements.
System
System
Range
Range
28 MHz
43 MHz
54 MHz
35 MHz
53 MHz
66 MHz
22 MHz
33 MHz
45 MHz
54 MHz
28 MHz
42 MHz
56 MHz
66 MHz
Even Initial
Even Initial
Address
Address
Handshaking
2
2
3
4
2
2
3
4
2
2
3
4
5
2
2
3
4
5
V
V
IO
IO
= 1.8 V
= 1.5 V
Odd Initial
Odd Initial
Address
Address
2
3
4
5
2
3
4
5
2
3
4
5
6
2
3
4
5
6
(54 MHz)
(66 MHz)
(54 MHz)
(66 MHz)
Device
Rating
Device
Rating
Speed
Speed
D
E
D
E
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