am42bds6408h Meet Spansion Inc., am42bds6408h Datasheet - Page 55

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am42bds6408h

Manufacturer Part Number
am42bds6408h
Description
Cmos 1.8 Volt-only Simultaneous Read/write, Burst Mode Flash Memory, And 8 Mbit 512 K X 16-bit Sram
Manufacturer
Meet Spansion Inc.
Datasheet
Synchronous/Burst Read (
Notes:
1. Addresses are latched on the first of either the active edge of CLK or the rising edge of AVD#.
2. Please contact AMD for availability of V
October 23, 2003
JEDEC Standard
Parameter
t
t
t
t
t
BACC
t
t
t
t
RACC
t
t
t
t
t
t
t
t
RDYS
t
t
t
t
IACC
IACC
ACH
BDH
t
t
ACC
OES
RCC
ACS
CEZ
OEZ
CES
AAS
AAH
CAS
AVC
AVD
CKA
CKZ
CR
OE
Description
Latency (Even address in Reduced wait-state
Handshake mode)
Latency (Standard Handshake or Odd address in
Reduced wait-state Handshake mode
Burst Access Time Valid Clock to Output Delay
Address Setup Time to CLK (Note 1)
Address Hold Time from CLK (Note 1)
Data Hold Time from Next Clock Cycle
Chip Enable to RDY Valid
Output Enable to Output Valid
Chip Enable to High Z
Output Enable to High Z
CE# Setup Time to CLK
RDY Setup Time to CLK
Ready Access Time from CLK
Address Setup Time to AVD# (Note 1)
Address Hold Time to AVD# (Note 1)
CE# Setup Time to AVD#
AVD# Low to CLK
AVD# Pulse
Access Time
CLK to access resume
CLK to High Z
Output Enable Setup Time
Read cycle for continuous suspend
A D V A N C E
V
IO
= 1.8 V
IO
= 1.5 V devices.
)
Am42BDS6408H
I N F O R M A T I O N
Max
Max
Max
Max
Max
Max
Max
Max
Max
Max
Max
Max
Min
Min
Min
Min
Min
Min
Min
Min
Min
Min
Min
(66 MHz)
E6, E7,
E8, E9
56
71
11
11
11
11
10
50
11
6
6
4
3
8
8
4
4
4
4
8
4
0
1
(54 MHz)
D6, D7,
D8, D9
87.5
13.5
13.5
13.5
13.5
13.5
69
10
10
12
55
10
5
7
4
5
5
5
7
5
5
Unit
ms
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
53

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