lc890561w Sanyo Semiconductor Corporation, lc890561w Datasheet - Page 24

• Manufacturer Part Number: lc890561w
• Description: Cmos Digital Audio Interface Receiver With Built-in Data Buffer Memory
• Manufacturer: Sanyo Semiconductor Corporation

13. Output Data Delay Function (DATAO, FSB0, FSB1, DLMP)
• It has built-in RAM that is utilized for the lip synchronization function that delays the sound data to the movie.
• Output data can be delayed for 256ms (fs = 48kHz) at the maximum.
• Delay processing of output data supports 24bit width data.
• The delayed data is outputted from DATAO terminal, not from DATAO2 terminal.
• Delay processing of output data is possible for demodulated data during PLL lock and serial audio data entered from
• V, U and C bits transferred with S/PDIF input data are not delayed.
• The signal that can be used for delay setting control of output data is outputted from FSB0, FSB1 and DLMP
13.1 How to Set
13.1.1 Output Data Delay Setup after Recovery Processing (DTMA[4:0], DTMB[3:0], DTMC[2:0])
• Output data delay after demodulation is set up by DTMA[4:0], DTMB[3:0] and DTMC[2:0] commands.
• It is possible to set different delay time for every input sampling frequency band by 10ms step unit.
• The delay time of 32kHz, 44.1kHz and 48kHz input data are set up with DTMA[4:0] commands.
• The delay time of 88.2kHz and 96kHz input data are set up with DTMB[3:0] commands.
• The delay time of 176.4kHz and 192kHz input data are set up with DTMC[2:0] commands.
the SDIN terminal.
terminals.
(“○” can be set, “ ” maximum delay time is set)
Delay time
100m
110m
120m
130m
140m
150m
160m
170m
180m
190m
200m
210m
220m
230m
240m
250m
(sec)
Max.
10m
20m
30m
40m
50m
60m
70m
80m
90m
0
Table 13.1 Delay Time Setup of Output Data for the Data after Recovery Processing
32k, 44.1k, 48k
(DTMA[4:0])
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Data fs after recovery processing (Hz) and setting commands
LC890561W
(DTMB[3:0])
88.2k, 96k
See section “14.5.2 Details of Write Commands”
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176.4k, 192k
(DTMC[2:0])
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