w65c265s Western Design Center, Inc., w65c265s Datasheet - Page 18

• Manufacturer Part Number: w65c265s
• Description: W65c265s 16?bit Microcontroller
• Manufacturer: Western Design Center, Inc.

Each Tone Generator(TGx), as shown in figure 1-13 is comprised of a 16 bit timer and a 16 step divider
circuit that selects the proper Digital to Analog (DA) output level. The enable bits for the tone generators are
located in bits 1 and 2 of the BCR registers (see Figure 1-2).
DA Level n = E COS (π x (2n+1) /16) 0 < n < 7
N=value loaded into timer latches
Register Value N = FCLK -1
16xF
DTMF Column
European 110,
Baud Modem
Baud Modem
Baud Modem
US 110, 300
DTMF Row
Subscriber
US 1200
Teletext
Tones
300
FCLK ⇒
Table 1-4 Communications Frequencies Generated by the Tone Generator Timers 5 and 6
Frequency
Standard
1209
1336
1477
1633
1070
1270
2025
2225
1180
1650
1850
1300
2100
1200
2200
(Hz)
697
770
852
941
350
440
480
620
980
390
450
390
450
FCLK=FCLK input clock
16 bit Timerx
F=desired frequency
decimal
00ED
01FB
01D1
00D0
00AF
006D
00BD
023D
00AB
023D
Hexi-
0140
0122
0106
00B8
00A6
0096
0088
027E
0168
0064
00E3
0087
0078
01F0
006A
01F0
00B9
0065
Figure 1-13 Tone Generator Block Diagram
1.11 Twin Tone Generators
Register
Value
FCLK = 3.579545 MHz
⇒
Oscillator
Decimal
Divide by 16
320
290
262
237
184
166
150
136
638
507
465
360
208
175
109
100
227
189
135
120
573
496
171
106
573
496
185
101
Frequency
Actual
1209
1340
1482
1633
1070
1271
2034
2215
1177
1645
1849
1301
2091
1203
2193
(Hz)
697
769
851
940
350
440
480
620
981
390
450
390
450
⇒
DA Converter
decimal
00CE
00BA
00AB
00CF
Hexi-
02C9
00E9
00C4
007A
006F
00FE
00D3
022B
00BF
022B
0166
0144
0124
0109
0098
0237
0208
0192
0097
0086
0280
0076
0280
0071
Register
Value
FCLK = 4.000000 MHz
⇒
Oscillator
Decimal
358
324
292
265
206
186
168
152
713
567
520
402
233
196
122
111
254
211
151
134
640
555
191
118
640
555
207
113
TGx
Frequency
18
Actual
1208
1337
1479
1634
1068
1269
2033
2232
1179
1645
1832
1302
2101
1202
2193
(Hz)
696
769
853
940
350
440
480
620
980
390
450
390
450