w65c265s Western Design Center, Inc., w65c265s Datasheet - Page 6

• Manufacturer Part Number: w65c265s
• Description: W65c265s 16?bit Microcontroller
• Manufacturer: Western Design Center, Inc.

External ROM Enable
0 = internal ROM ($E000-$FFFF)
1 = external ROM ($E000-$FFFF)
Note #1: Input is level sensitive, NMIB and ABORTB can not both be enabled at the same time.
7
NMIB enable
0 = disable NMIB
1 = enable NMIB on P40 See Note #1
6
ABORTB enable
0 = disable ABORTB
1 = enable ABORTB on P40 See Note #1
5
Figure 1-2 Bus Control Register (BCR)
Monitor "Watch Dog" Enable
0 = disable
1 = enable
4
In-Circuit-Emulation (ICE) Enable
0 = RUN = RUN, BA = BA/1, W65C265S is in normal mode of
operation
1 = RUN = RUN, BA = BA, All on-chip addressed memory or
I/O for reads or writes are output on the data bus (this is the
emulation mode of operation)
3
Tone Generator 1 (TG1) Enable
0 = Disable TG1
1 = Enable TG1
2
Toner Generator 0 (TG0) Enable
0 = Disable TG0
1 = Enable TG0
1
External Memory Bus
Enable
0 = Ports 0,1,2,3 are I/O
1 = Ports 0,1,2,3 are
address and data bus for
external memory or I/O
access
0
BCRx ($DF40)
6