w65c265s Western Design Center, Inc., w65c265s Datasheet - Page 35

• Manufacturer Part Number: w65c265s
• Description: W65c265s 16?bit Microcontroller
• Manufacturer: Western Design Center, Inc.

2.5
2.5.1 BE controls the address bus, data bus and WEB signals. When RESB goes high signaling in the
2.5.2 After RESB goes high BE controls the direction of the address bus (A0-A7, A8-A15, A16-A23), data
2.5.3 When BE goes low during PHI2 low time, the address bus and WEB are inputs, providing for DMA
2.5.4 When BE is high, the A0-A15, D0-D7 and WEB are controlled by the on-chip microprocessor.
2.5.5 When BE is pulled low during PHI2 high time, BE does not affect the direction of the address, data
1)
2)
Bus Enable and RDY Input (BE)
power-up condition, the processor starts; and if BE was low when RESB went from low to high then
the Bus Control Register (BCR) bits 0, 3, and 7 (BCR0, BCR3, and BCR7) are set to 1 (emulation
mode). See Figure 1-1.
bus (D0-D7) and WEB.
(direct memory and I/O access) for emulation purposes. Data from D0-D7 is written to any register
addressed by A0-A15 when WEB is low. Data is read from D0-D7 when WEB is high. The
W65C816S is stopped when BE is low, during PHI2 high time.
BUS and WEB signals. When BE is pulled low in PHI2 high time, the W65C816S
the processor may be single stepped in emulation.
Address and WEB are inputs with data bus input except when reading on-chip I/O registers or
memory. Use this mode for DMA.
W65C816S stopped with RDY function of BE pin. When BCR3=1, the W65C816S read or write of
internal I/O register or memory is output on the external data bus so that the internal data bus may
be traced in emulation.
Figure 2-5 BE Timing Relative to PHI2
BE = BE· (RDY + PHI2B)
Notes:
is stopped so that
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