IDT72261 IDT [Integrated Device Technology], IDT72261 Datasheet - Page 16

• Manufacturer Part Number: IDT72261
• Description: CMOS SUPERSYNC FIFOO 16,384 x 9, 32,768 x 9
• Manufacturer: IDT [Integrated Device Technology]

IDT72261/72271 SyncFIFO
16,384 x 9, 32,768 x 9
D
NOTES:
1. t
2.
WCLK
RCLK
WEN
REN
0
FF
LD
If the time between the rising edge of RCLK and the rising edge of WCLK is less than t
cycle.
- D
SKEW1
= HIGH
8
is the minimum time between a rising RCLK edge and a rising WCLK edge to guarantee that
1
t
SKEW1
t
CLKH
(1)
t
CLK
Figure 6. Write Cycle Timing (IDT Standard Mode)
t
CLKL
2
t
WFF
DATA
IN
VALID
SKEW1
MILITARY AND COMMERCIAL TEMPERATURE RANGES
, then the
t
t
ENS
DS
FF
t
t
ENH
FF
DH
will go HIGH (after one WCLK cycle plus t
deassertion may be delayed an extra WCLK
t
WFF
NO OPERATION
3036 drw 09
16
WFF
).