IDT72275 IDT [Integrated Device Technology], IDT72275 Datasheet - Page 12

• Manufacturer Part Number: IDT72275
• Manufacturer: IDT [Integrated Device Technology]

IDT72275/72285 SUPERSYNC FIFO™
32,768 x 18, 65,536 x 18
SIGNAL DESCRIPTION
INPUTS:
DATA IN (D
CONTROLS:
MASTER RESET (
is taken to a LOW state. This operation sets the internal read
and write pointers to the first location of the RAM array.
will go LOW,
Standard mode, along with
LOW and
Word Fall Through mode (FWFT), along with
selected.
threshold 127 words from the empty boundary and
assigned a threshold 127 words from the full boundary; 127
words corresponds to an offset value of 07FH. Following
Master Reset, parallel loading of the offsets is permitted, but
not serial loading.
a threshold 1,023 words from the empty boundary and
assigned a threshold 1,023 words from the full boundary;
1,023 words corresponds to an offset value of 3FFH. Follow-
ing Master Reset, serial loading of the offsets is permitted, but
not parallel loading.
section describing the
all zeroes. A Master Reset is required after power up, before
a write operation can take place.
diagram.
PARTIAL RESET (
taken to a LOW state. As in the case of the Master Reset, the
internal read and write pointers are set to the first location of the
RAM array,
Standard mode or First Word Fall Through, that mode will
remain selected. If the IDT Standard mode is active, then
go HIGH and
mode is active, then
ters remain unchanged. The programming method (parallel
or serial) currently active at the time of Partial Reset is also
retained. The output register is initialized to all zeroes.
is asynchronous.
course of operation, when reprogramming partial flag offset
settings may not be convenient.
diagram.
Data inputs for 18-bit wide data.
A Master Reset is accomplished whenever the
If
Parallel reading of the registers is always permitted. (See
During a Master Reset, the output register is initialized to
See Figure 5, Master Reset Timing , for the relevant timing
A Partial Reset is accomplished whenever the
Whichever mode is active at the time of Partial Reset, IDT
Following Partial Reset, all values held in the offset regis-
A Partial Reset is useful for resetting the device during the
See Figure 6, Partial Reset Timing , for the relevant timing
If
LD
If FWFT is LOW during Master Reset then the IDT
LD
is LOW during Master Reset, then
is HIGH during Master Reset, then
OR
FF
PAE
0
EF
will go HIGH. If FWFT is HIGH, then the First
- D
will go HIGH and
PAF
goes LOW,
will go LOW. If the First Word Fall Through
17
)
MRS
MRS
MRS
MRS
MRS
PRS
PRS
PRS
PRS
PRS
will go HIGH, and
OR
LD
)
)
will go HIGH, and
pin for further details.)
PAF
EF
and
goes HIGH, and
IR
MRS
FF
will go LOW.
are selected.
HF
is asynchronous.
will go HIGH.
IR
PAE
PAE
will go LOW.
IR
HF
is assigned a
PRS
and
is assigned
goes HIGH.
MRS
EF
OR
input is
PAF
PAF
will go
FF
input
, are
PAE
PRS
will
is
is
RETRANSMIT (
read to be accessed again. There are two stages: first, a setup
procedure that resets the read pointer to the first location of
memory, then the actual retransmit, which consists of reading out
the memory contents, starting at the beginning of the memory.
rising RCLK edge.
bringing
beginning of the Retransmit setup by setting
change in level will only be noticeable if
setup. During this period, the internal read pointer is initialized
to the first location of the RAM array.
read operations may begin starting with the first location in
memory. Since IDT Standard mode is selected, every word
read including the first word following Retransmit setup re-
quires a LOW on
Figure 11, Retransmit Timing (IDT Standard Mode) , for the
relevant timing diagram.
the Retransmit setup by setting
internal read pointer is set to the first location of the RAM array.
same time, the contents of the first location appear on the
outputs. Since FWFT mode is selected, the first word appears
on the outputs, no LOW on
subsequent words requires a LOW on
edge of RCLK. See Figure 12, Retransmit Timing (FWFT
Mode) , for the relevant timing diagram.
FIRST WORD FALL THROUGH/SERIAL IN (FWFT/SI)
FWFT/SI input determines whether the device will operate in IDT
Standard mode or First Word Fall Through (FWFT) mode.
Standard mode will be selected. This mode uses the Empty
Flag (
present in the FIFO memory. It also uses the Full Flag function
(
space for writing. In IDT Standard mode, every word read
from the FIFO, including the first, must be requested using the
Read Enable (
FWFT mode will be selected. This mode uses Output Ready
(
outputs (Q
or not the FIFO memory has any free space for writing. In the
FWFT mode, the first word written to an empty FIFO goes
directly to Q
necessary. Subsequent words must be accessed using the
Read Enable (
loading
The serial input function can only be used when the serial
loading method has been selected during Master Reset.
Serial programming using the FWFT/SI pin functions the
same way in both IDT Standard and FWFT modes.
FF
OR
The Retransmit operation allows data that has already been
Retransmit setup is initiated by holding
If IDT Standard mode is selected, the FIFO will mark the
When
If FWFT mode is selected, the FIFO will mark the beginning of
When
This is a dual purpose pin. During Master Reset, the state of the
If, at the time of Master Reset, FWFT/SI is LOW, then IDT
If, at the time of Master Reset, FWFT/SI is HIGH, then
After Master Reset, FWFT/SI acts as a serial input for
) to indicate whether or not the FIFO memory has any free
) to indicate whether or not there is valid data at the data
EF
PAE
RT
) to indicate whether or not there are any words
OR
EF
n)
n
. It also uses Input Ready (
LOW.
and
goes HIGH, Retransmit setup is complete and
after three RCLK rising edges,
goes LOW, Retransmit setup is complete; at the
REN
REN
RT RT RT RT RT
PAF
REN
)
) and RCLK.
) and RCLK.
offsets into the programmable registers.
REN
to enable the rising edge of RCLK. See
COMMERCIAL TEMPERATURE RANGE
and
REN
OR
WEN
HIGH. During this period, the
is necessary. Reading all
REN
must be HIGH before
IR
EF
) to indicate whether
to enable the rising
RT
was HIGH before
REN
EF
LOW during a
= LOW is not
LOW. The
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