IDT72275 IDT [Integrated Device Technology], IDT72275 Datasheet - Page 21

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IDT72275

Manufacturer Part Number
IDT72275
Description
Manufacturer
IDT [Integrated Device Technology]
Datasheet

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NOTES:
1. Retransmit setup is complete after
2. No more than D - 2 words may be written to the FIFO between Reset (Master or Partial) and Retransmit setup. Therefore,
3.
4. W
5.
NOTE:
1. X = 14 for the IDT72275 and X = 15 for the IDT72285.
IDT72275/72285 SUPERSYNC FIFO™
32,768 x 18, 65,536 x 18
Q
WCLK
WCLK
RCLK
Retransmit setup procedure. D = 32,769 for the IDT72275 and 65,537 for the IDT72285.
OE
OR
0
- Q
1
, W
SI
= LOW
goes LOW at 60 ns + 2 RCLK cycles + t
n
2
, W
t
ENS
3
= first, second and third words written to the FIFO after Master Reset.
W
x
t
Figure 13. Serial Loading of Programmable Flag Registers (IDT Standard and FWFT Modes)
ENH
BIT 0
t
t
ENS
LDS
t
DS
t
ENS
t
RTS
t
RTS
OR
returns LOW.
t
t
ENH
LDH
REF
EMPTY OFFSET
.
t
t
REF
t
ENH
HF
t
SKEW2
1
Figure 12. Retransmit Timing (FWFT Mode)
2
t
PAF
1
W
x+1
BIT X
(1)
BIT 0
2
t
PAE
FULL OFFSET
COMMERCIAL TEMPERATURE RANGE
3
t
A
t
ENH
t
REF
IR
(5)
W
will be LOW throughout the
1
(4)
BIT X
t
t
LDH
t
ENH
DH
(1)
W
4
2
t
A
4674 drw 16
4674 drw 15
t
ENH
21
W
3

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