IDT72275 IDT [Integrated Device Technology], IDT72275 Datasheet - Page 23

• Manufacturer Part Number: IDT72275
• Manufacturer: IDT [Integrated Device Technology]

NOTES:
1. n =
2. For IDT Standard mode
3. For FWFT mode.
4. t
5.
IDT72275/72285 SUPERSYNC FIFO™
32,768 x 18, 65,536 x 18
NOTES:
1. For IDT Standard mode: D = maximum FIFO depth. D = 32,768 for the IDT72275 and 65,536 for the IDT72285.
2. For FWFT mode: D = maximum FIFO depth. D = 32,769 for the IDT72275 and 65,537 for the IDT72285.
WCLK
WCLK
RCLK
RCLK
time between the rising edge of WCLK and the rising edge of RCLK is less than t
PAE
SKEW2
PAE
is asserted and updated on the rising edge of WCLK only.
is the minimum time between a rising WCLK edge and a rising RCLK edge to guarantee that
t
CLKH
offset.
t
ENS
n words in FIFO
n+1 words in FIFO
Figure 17. Programmable Almost-Empty Flag Timing (IDT Standard and FWFT Modes)
t
CLKL
[
t
ENH
(2) ,
t
SKEW2
1
D/2 words in FIFO
(3)
Figure 18. Half-Full Flag Timing (IDT Standard and FWFT Modes)
+ 1
(4)
]
words in FIFO
t
CLKH
t
PAE
(1)
,
2
(2)
t
ENS
t
CLKL
t
SKEW2
ENH
t
t
HF
ENS
, then the
t
n+1 words in FIFO
n+2 words in FIFO
ENS
[
PAE
D/2 + 1 words in FIFO
t
PAE
ENH
+ 2
deassertion may be delayed one extra RCLK cycle.
]
will go HIGH (after one RCLK cycle plus t
words in FIFO
(2) ,
(3)
t
HF
COMMERCIAL TEMPERATURE RANGE
1
(1)
,
(2)
[
t
PAE
D/2 words in FIFO
+ 1
2
]
words in FIFO
n words in FIFO
n+1 words in FIFO
4674 drw 21
PAE
(1)
4674 drw 20
,
). If the
(2)
23
(2) ,
(3)