S29CD016G SPANSION, S29CD016G Datasheet - Page 19

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S29CD016G

Manufacturer Part Number
S29CD016G
Description
16 Megabit (512 K x 32-Bit) CMOS 2.5 Volt-only Burst Mode / Dual Boot / Simultaneous Read/Write Flash Memory
Manufacturer
SPANSION
Datasheet

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L = Logic Low = V
Note: The autoselect codes may also be accessed in-system via command sequences. See Tables 18 and 20.
November 5, 2004 S29CD016_00_A4
Manufacturer ID:
Spansion
PPB Protection
Status
Description
Asynchronous Read Operation (Non-Burst)
Read Cycle 1
Read Cycle 2
Read Cycle 3
IL
to be programmed with its corresponding programming algorithm. However, the
autoselect codes can also be accessed in-system through the command register.
When using programming equipment, the autoselect mode requires V
dress pin A9. Address pins A6, A1, and A0 must be as shown in
page 34
dition, when verifying sector protection, the sector address must appear on the
appropriate highest order address bits (see Tables 1 and).
maining address bits that are don’t care. When all necessary bits are set as
required, the programming equipment may then read the corresponding identi-
fier code on DQ7–DQ0.
To access the autoselect codes in-system, the host system can issue the autose-
lect command via the command. This method does not require V
“Command Definitions” on page 43
The device includes two control functions which must be satisfied in order to ob-
tain data at the outputs. CE# is the power control and should be used for device
selection. OE# is the output control and should be used to gate data to the output
pins if the device is selected. The device is power-up in an asynchronous read
mode. In the asynchronous mode the device includes two control functions which
must be satisfied in order to obtain data at the outputs. CE# is the power control
and should be used for device selection. OE# is the output control and should be
used to gate data to the output pins if the device is selected.
Address access time (t
output data. The chip enable access time (t
dresses and stable CE# to valid data at the output pins. The output enable access
time is the delay from the falling edge of OE# to valid data at the output pins
(assuming the addresses are stable for at least t
, H = Logic High = V
CE#
L
L
L
L
L
Table 5. S29CD016G Autoselect Codes (High Voltage Method)
(top boot devices) or
OE#
A d v a n c e
L
L
L
L
L
WE#
H
H
H
H
H
IH
, SA = Sector Address, X = Don’t care.
A18
A11
SA
to
X
X
X
X
ACC
) is equal to the delay from stable addresses to valid
A10
I n f o r m a t i o n
X
X
X
X
X
Table 13 on page 36
V
V
V
V
V
A9
ID
ID
ID
ID
ID
S29CD016G
for details on using the autoselect mode.
A8
X
X
X
X
X
A7
X
L
L
L
L
CE
) is the delay from the stable ad-
A6
ACC
L
L
L
L
L
(bottom boot devices). In ad-
–t
A5
A4
to
X
X
L
L
L
OE
time).
A3
Table 5
H
H
L
L
L
A2
H
H
L
L
L
shows the re-
Table 12 on
A1
H
H
H
L
L
ID
ID
on ad-
A0
H
H
. See
L
L
L
Ordering Option
Ordering Option
(unprotected)
(protected)
0001h
007Eh
0036h
0000h
0001h
0000h
0001h
DQ7
DQ0
00
01
to
19

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