MT46V16M8TG-8L MICRON [Micron Technology], MT46V16M8TG-8L Datasheet - Page 40

• Manufacturer Part Number: MT46V16M8TG-8L
• Description: DOUBLE DATA RATE DDR SDRAM
• Manufacturer: MICRON [Micron Technology]

NOTE (continued):
11. Requires appropriate DM masking.
12. A WRITE command may be applied after the completion of the READ burst; otherwise, a BURST TERMI-
128Mb: x4, x8, x16 DDR SDRAM
128Mx4x8x16DDR_C.p65 – Rev. C; Pub. 4/01
10. READs or WRITEs listed in the Command/Action column include READs or WRITEs with auto precharge
5. The following states must not be interrupted by any executable command; COMMAND INHIBIT or NOP
6. All states and sequences not shown are illegal or reserved.
7. Not bank-specific; requires that all banks are idle, and bursts are not in progress.
8. May or may not be bank-specific; if multiple banks are to be precharged, each must be in a valid state for
9. Not bank-specific; BURST TERMINATE affects the most recent READ burst, regardless of bank.
commands must be applied on each positive clock edge during these states.
precharging.
enabled and READs or WRITEs with auto precharge disabled.
NATE must be used to end the READ burst prior to asserting a WRITE command.
Accessing Mode
Precharging All: Starts with registration of a PRECHARGE ALL command and ends when
Refreshing: Starts with registration of an AUTO REFRESH command and ends when
Register: Starts with registration of a LOAD MODE REGISTER command and ends when
Once
has been met. Once
Once
t
t
RC is met, the DDR SDRAM will be in the all banks idle state.
RP is met, all banks will be in the idle state.
t
MRD is met, the DDR SDRAM will be in the all banks idle state.
40
Micron Technology, Inc., reserves the right to change products or specifications without notice.
128Mb: x4, x8, x16
DDR SDRAM
PRELIMINARY
t
©2001, Micron Technology, Inc.
t
RP is met.
RC is met.
t
MRD