MT46V16M8TG-8L MICRON [Micron Technology], MT46V16M8TG-8L Datasheet - Page 56

• Manufacturer Part Number: MT46V16M8TG-8L
• Description: DOUBLE DATA RATE DDR SDRAM
• Manufacturer: MICRON [Micron Technology]

128Mb: x4, x8, x16 DDR SDRAM
128Mx4x8x16DDR_C.p65 – Rev. C; Pub. 4/01
NOTE:
DQ (First data no longer valid)
DQ (First data no longer valid)
All DQs and DQS, collectively
1. DQs transitioning after DQS transition define t DQSQ window. DQS transitions at T2 and at T2n are an “early DQS,”
2. For a x4, only two DQs apply.
3. t DQSQ is derived at each DQS clock edge and is not cumulative over time and begins with DQS transition and
4. t QH is derived from t HP : t QH = t HP - t QHS.
5. t HP is the lesser of t CL or t CH clock transition collectively when a bank is active.
6. The data valid window is derived for each DQS transitions and is defined as t QH minus t DQSQ.
at T3 is a “nominal DQS,” and at T3n is a "late DQS"
ends with the last valid transition of DQs .
DQ (Last data valid)
DQ (Last data valid)
Data Output Timing –
Earliest signal transition
Latest signal transition
DQS
QFC#
CK#
DQ
DQ
DQ
DQ
DQ
DQ
CK
1
2
2
2
2
2
2
6
T1
t HP
5
Figure 29 – x4, x8
t
t HP
DQSQ,
5
t DQSQ
t QH
T2
4
56
window
3
Valid
Data
t
T2
T2
T2
QH and Data Valid Window
t HP
5
t DQSQ
T2n
t QH
4
Micron Technology, Inc., reserves the right to change products or specifications without notice.
3
window
t HP
T2n
Valid
T2n
Data
T2n
5
T3
t DQSQ
t QH
128Mb: x4, x8, x16
4
t HP
3
window
5
Valid
Data
T3
T3
T3
T3n
DDR SDRAM
t DQSQ
t QH
t HP
PRELIMINARY
5
4
3
window
©2001, Micron Technology, Inc.
T4
Valid
T3n
T3n
Data
T3n