MT46V16M8TG-8L MICRON [Micron Technology], MT46V16M8TG-8L Datasheet - Page 61

• Manufacturer Part Number: MT46V16M8TG-8L
• Description: DOUBLE DATA RATE DDR SDRAM
• Manufacturer: MICRON [Micron Technology]

TIMING PARAMETERS
128Mb: x4, x8, x16 DDR SDRAM
128Mx4x8x16DDR_C.p65 – Rev. C; Pub. 4/01
COMMAND
A0-A9, A11
BA0, BA1
SYMBOL
t
t
t
t
CH
CL
CK (2.5)
CK (2)
DQS
A10
DM
DQ
CK#
CKE
CK
4
4
4
1
1
1
1
NOTE:
MIN
0.45
0.45
7.5
7.5
t
t
IS
IS
NOP 2
T0
-75Z
t
t
IH
1. PRE = PRECHARGE, ACT = ACTIVE, AR = AUTO REFRESH, RA = Row Address, BA = Bank Address.
2. NOP commands are shown for ease of illustration; other valid commands may be possible at these times. CKE must be active (high)
3. “Don’t Care” if A10 is HIGH at this point; A10 must be HIGH if more than one bank is active (i.e., must precharge all active banks).
4. QFC, DM, DQ, and DQS signals are all “Don’t Care”/High-Z for operations shown.
5. The second AUTO REFRESH is not required and is only shown as an example of two back-to-back AUTO REFRESH commands.
IH
MAX
during clock positive transitions.
0.55
0.55
13
13
ALL BANKS
ONE BANK
t
Bank(s) 3
IS
MIN
0.45
0.45
PRE
T1
7.5
10
t
IH
-75
t
CK
MAX
0.55
0.55
13
13
VALID
NOP 2
T2
MIN
0.45
0.45
t
10
CH
8
t RP
-8
t
MAX
CL
AUTO REFRESH MODE
0.55
0.55
13
13
NOP 2
T3
UNITS
t
t
ns
ns
CK
CK
61
T4
AR
(
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SYMBOL
t
t
t
t
(
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(
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IH
IS
RFC
RP
t RFC
NOP 2
Ta0
Micron Technology, Inc., reserves the right to change products or specifications without notice.
MIN
75
20
1
1
-75Z
AR 5
Ta1
MAX
128Mb: x4, x8, x16
(
(
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MIN
75
20
1
1
VALID
NOP 2
Tb0
-75
MAX
DDR SDRAM
t RFC 5
PRELIMINARY
MIN
1.1
1.1
80
20
NOP 2
Tb1
©2001, Micron Technology, Inc.
-8
MAX
DON’T CARE
UNITS
Tb2
ACT
RA
RA
BA
ns
ns
ns
ns