SAA7109 PHILIPS [NXP Semiconductors], SAA7109 Datasheet - Page 103

• Manufacturer Part Number: SAA7109
• Description: PC-CODEC
• Manufacturer: PHILIPS [NXP Semiconductors]

Philips Semiconductors
11 BOUNDARY SCAN TEST
The SAA7108E; SAA7109E has built-in logic and 2 times
5 dedicated pins to support boundary scan testing,
separately for the encoder and decoder part, which allows
board testing without special hardware (nails). The
SAA7108E; SAA7109E follows the “IEEE Std. 1149.1 -
Standard Test Access Port and Boundary-Scan
Architecture” set by the Joint Test Action Group (JTAG)
chaired by Philips.
The 10 special pins are Test Mode Select (TMSe and
TMSd), Test Clock (TCKe and TCKd), Test Reset
(TRSTe and TRSTd), Test Data Input (TDIe and TDId)
and Test Data Output (TDOe and TDOd), where extension
‘e’ refers to the encoder part and extension ‘d’ refers to the
decoder part.
Table 64 BST instructions supported by the SAA7108E; SAA7109E
11.1
The Test Access Port (TAP) controller of an IC should be
in the reset state (TEST_LOGIC_RESET) when the IC is
in functional mode. This reset state also forces the
instruction register into a functional instruction such as
IDCODE or BYPASS.
To solve the power-up reset, the standard specifies that
the TAP controller will be forced asynchronously to the
TEST_LOGIC_RESET state by setting the TRSTe or
TRSTd pin LOW.
11.2
A device identification register is specified in “IEEE Std.
1149.1b-1994” . It is a 32-bit register which contains fields
for the specification of the IC manufacturer, the IC part
number and the IC version number. Its biggest advantage
2004 Mar 16
INSTRUCTION
PC-CODEC
SAMPLE
BYPASS
EXTEST
IDCODE
INTEST
CLAMP
USER1
Initialization of boundary scan circuit
Device identification codes
This mandatory instruction provides a minimum length serial path (1 bit) between TDIe (or TDId)
and TDOe (or TDOd) when no test operation of the component is required.
This mandatory instruction allows testing of off-chip circuitry and board level interconnections.
This mandatory instruction can be used to take a sample of the inputs during normal operation of
the component. It can also be used to preload data values into the latched outputs of the boundary
scan register.
This optional instruction is useful for testing when not all ICs have BST. This instruction addresses
the bypass register while the boundary scan register is in external test mode.
This optional instruction will provide information on the components manufacturer, part number and
version number.
This optional instruction allows testing of the internal logic (no support for customers available).
This private instruction allows testing by the manufacturer (no support for customers available).
103
DESCRIPTION
The Boundary Scan Test (BST) functions BYPASS,
EXTEST, INTEST, SAMPLE, CLAMP and IDCODE are all
supported; see Table 64. Details about the JTAG
BST-TEST can be found in the specification “ IEEE Std.
1149.1” . Two files containing the detailed Boundary Scan
Description Language (BSDL) of the SAA7108E;
SAA7109E are available on request.
is the possibility to check for the correct ICs mounted after
production and to determine the version number of the ICs
during field service.
When the IDCODE instruction is loaded into the BST
instruction register, the identification register will be
connected between TDIe (or TDId) and TDOe (or TDOd)
of the IC. The identification register will load a component
specific code during the CAPTURE_DATA_REGISTER
state of the TAP controller, this code can subsequently be
shifted out. At board level this code can be used to verify
component manufacturer, type and version number. The
device identification register contains 32 bits, numbered
31 to 0, where bit 31 is the most significant bit (nearest to
TDIe or TDId) and bit 0 is the least significant bit (nearest
to TDOe or TDOd); see Fig.46.
SAA7108E; SAA7109E
Product specification