SAA7109 PHILIPS [NXP Semiconductors], SAA7109 Datasheet - Page 87

• Manufacturer Part Number: SAA7109
• Description: PC-CODEC
• Manufacturer: PHILIPS [NXP Semiconductors]

Philips Semiconductors
9.5.5
As horizontal and vertical reference signals are logic 1,
active gate signals are generated, which frame the transfer
of the valid output data. Alternatively, the horizontal and
vertical trigger pulses can be generated on the rising
edges of the gates.
Due to the dynamic FIFO behaviour of the complete scaler
path, the output signal timing has no fixed timing
relationship to the real-time input video stream. Thus fixed
propagation delays, in terms of clock cycles, related to the
analog input can not be defined.
The data stream is accompanied by a data qualifier.
Additionally invalid data cycles are marked with code 00H.
Table 48 SAV/EAV codes on the I port
Notes
1. The leading byte sequence is: FFH-00H-00H.
2. The MSB of the SAV/EAV code byte is controlled by:
2004 Mar 16
Next pixel is FIRST pixel of any
active line
Previous pixel was LAST pixel
of any active line, but not the
last
Next pixel is FIRST pixel of any
V-blanking line
Previous pixel was LAST pixel
of the last active line or of any
V-blanking line
No valid data, do not capture
and do not increment pointer
PC-CODEC
a) Scaler output data: task A
b) VBI data slicer output data: DID[5:0] 5DH[5:0] = 3EH
EVENT DESCRIPTION
D
GENERATION
ATA STREAM CODING AND REFERENCE SIGNAL
(
SUBADDRESSES
MSB
FIELD ID = 0
MSB = CONLH[90H[7]]; task B
84H, 85H
(2)
0E
13
25
38
OF SAV/EAV BYTE = 0 MSB
SAV/EAV CODES ON I PORT
AND
FIELD ID = 1
93H)
49
54
62
7F
87
If ITU 656 like codes are not required, they can be
suppressed in the output stream.
As a further option, it is possible to provide the scaler with
an external gating signal on pin ITRDY. It is therefore
possible to hold the data output for a certain time and to
get valid output data in bursts of a guaranteed length.
The sketched reference signals and events can be
mapped to the I port output pins IDQ, IGPH, IGPV, IGP0
and IGP1. The polarities of all the outputs can be modified
to enable flexible use. The default polarity for the qualifier
and reference signals is logic 1 (active).
Table 48 shows the relevant and supported SAV and EAV
coding.
MSB = 1; DID[5:0] 5DH[5:0] = 3FH
00
FIELD ID = 0
MSB = CONLH[C0H[7]].
(2)
AB
9D
B6
80
OF SAV/EAV BYTE = 1
(1)
(HEX)
SAA7108E; SAA7109E
FIELD ID = 1
EC
C7
DA
F1
Product specification
HREF = active;
VREF = active
HREF = inactive;
VREF = active
HREF = active;
VREF = inactive
HREF = inactive;
VREF = inactive
IDQ pin inactive
MSB = 0.
COMMENT