ADE5166_08 AD [Analog Devices], ADE5166_08 Datasheet - Page 16

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ADE5166_08

Manufacturer Part Number
ADE5166_08
Description
Single-Phase Energy Measurement IC with 8052 MCU, RTC, and LCD Driver
Manufacturer
AD [Analog Devices]
Datasheet
ADE5166/ADE5169
Pin No.
42
43
44
45
46
47
48
49, 50
51
52, 53
54
55
56
57
58
59
60
61
62
63
64
Mnemonic
P0.3/CF2
P0.2/CF1/RTCCAL
SDEN/P2.3/TxD2
BCTRL/INT1/P0.0
XTAL2
XTAL1
INT0
V
EA
I
AGND
I
RESET
REF
V
V
V
V
V
DGND
V
PA
PB
P
BAT
INTA
DD
SWOUT
INTD
DCIN
, V
, I
N
IN/OUT
N
Description
General-Purpose Digital I/O Port 0.3/Calibration Frequency Logic Output 2. The CF2 logic output gives
instantaneous active, reactive, I
General-Purpose Digital I/O Port 0.2/Calibration Frequency Logic Output 1/RTC Calibration Frequency Logic
Output. The CF1 logic output gives instantaneous active, reactive, or apparent power or I
RTCCAL logic output gives access to the calibrated RTC output.
Serial Download Mode Enable/General-Purpose Digital Output Port P2.3/Transmitter Data Output 2
(Asynchronous). This pin is used to enable serial download mode through a resistor when pulled low on
power-up or reset. On reset, this pin momentarily becomes an input, and the status of the pin is sampled. If
there is no pull-down resistor in place, the pin momentarily goes high and then user code is executed. If the
pin is pulled down on reset, the embedded serial download/debug kernel executes, and this pin remains
low during the internal program execution. After reset, this pin can be used as a digital output port pin (P2.3)
or as Transmitter Data Output 2 (asynchronous).
Digital Input for Battery Control/External Interrupt Input 1/General-Purpose Digital I/O Port 0.0. This logic
input connects V
open, the connection between V
A crystal can be connected across this pin and XTAL1 (see XTAL1 pin description) to provide a clock source
for the ADE5166/ADE5169. The XTAL2 pin can drive one CMOS load when an external clock is supplied at
XTAL1 or by the gate oscillator circuit. An internal 6 pF capacitor is connected to this pin.
An external clock can be provided at this logic input. Alternatively, a tuning fork crystal can be connected
across XTAL1 and XTAL2 to provide a clock source for the ADE5166/ADE5169. The clock frequency for
specified operation is 32.768 kHz. An internal 6 pF capacitor is connected to this pin.
External Interrupt Input 0.
Analog Inputs for Voltage Channel. These inputs are fully differential voltage inputs with a maximum
differential level of ±400 mV for specified operation. This channel also has an internal PGA.
This pin is used as an input for emulation. When held high, this input enables the device to fetch code from
internal program memory locations. The ADE5169 does not support external code memory. This pin should
not be left floating.
Analog Inputs for Current Channel. These inputs are fully differential voltage inputs with a maximum
differential level of ±400 mV for specified operation. This channel also has an internal PGA.
This pin provides the ground reference for the analog circuitry.
Analog Input for Second Current Channel. This input is fully differential with a maximum differential level of
±400 mV, referred to I
Reset Input, Active Low.
This pin provides access to the on-chip voltage reference. The on-chip reference has a nominal value of
1.2 V ± 0.1% and a typical temperature coefficient of 50 ppm/°C maximum. This pin should be decoupled
with a 1 μF capacitor in parallel with a ceramic 100 nF capacitor.
Power Supply Input from the Battery with a 2.4 V to 3.7 V Range. This pin is connected internally to V
the battery is selected as the power supply for the ADE5166/ADE5169.
This pin provides access to the on-chip 2.5 V analog LDO. No external active circuitry should be connected to
this pin. This pin should be decoupled with a 10 μF capacitor in parallel with a ceramic 100 nF capacitor.
3.3 V Power Supply Input from the Regulator. This pin is connected internally to V
selected as the power supply for the ADE5166/ADE5169. This pin should be decoupled with a 10 μF
capacitor in parallel with a ceramic 100 nF capacitor.
3.3 V Power Supply Output. This pin provides the supply voltage for the LDOs and internal circuitry of the
ADE5166/ADE5169. This pin should be decoupled with a 10 μF capacitor in parallel with a ceramic 100 nF
capacitor.
This pin provides access to the on-chip 2.5 V digital LDO. No external active circuitry should be connected to
this pin. This pin should be decoupled with a 10 μF capacitor in parallel with a ceramic 100 nF capacitor.
This pin provides the ground reference for the digital circuitry.
Analog Input for DC Voltage Monitoring. The maximum input voltage on this pin is V
AGND. This pin is used to monitor the preregulated dc voltage.
DD
or V
N
for specified operation. This channel also has an internal PGA.
BAT
to V
Rev. 0 | Page 16 of 148
SWOUT
rms
DD
, or apparent power information.
internally when set to logic high or logic low, respectively. When left
or V
BAT
and V
SWOUT
is selected internally.
SWOUT
SWOUT
when the regulator is
rms
with respect to
, information. The
DD
when

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